AKD4368 Datasheet, PDF (2/39 Pages) Asahi Kasei Microsystems – Evaluation board Rev.1 for AK4368

ASAHI KASEI
[AKD4368-A]
1. Evaluation Board Manual
Operation sequence
1) Set up the power supply lines.
[AVDD] (orange)
= 1.6 ∼ 3.6V : for AVDD, DVDD and PVDD of AK4368 (typ. 2.4V)
[HVDD] (orange)
= 1.6 ∼ 3.6V : for HVDD of AK4368 (typ. 2.4V)
[D3V] (orange)
= 1.6 ∼ 3.6V : for 74LVC541 and 74LVC245A (typ. 2.4V)
[VCC] (red)
= 5.0V
: for logic (typ. 5.0V)
[AGND] (black)
= 0V
: for analog ground
[DGND] (black)
= 0V
: for logic ground
Each supply line should be distributed from the power supply unit.
2) Set up the evaluation mode, jumper pins. (See the followings.)
3) Power on.
The AK4368 and AK4114 should be resets once bringing SW3 (DAC_PDN) and SW2 (DIR_PDN) “L” upon
power-up.
Evaluation mode
In case of the AK4368 evaluation using the AK4114, it is necessary to correspond to audio interface format
for the AK4368 and AK4114. About the AK4368’s audio interface format, refer to datasheet of the AK4368.
About the AK4114’s audio interface format, refer to Table 2 in this manual.
Applicable Evaluation Mode
(1) PLL Master Mode
(2) PLL Slave Mode
(3) EXT Slave Mode
(3-1) In case of using DIR (Optical Link) <default>
(3-2) In case of connecting AK4368 with a external DSP
(1) PLL Master Mode
PORT3 (ROM) is used. Nothing should be connected to PORT1 (DIR). MCLK, BICK, LRCK and SDATA are
supplied from DSP. It is possible to evaluate at various sampling frequencies using built-in the AK4368’s PLL.
AK4368
MCKI
MCKO
BICK
LRCK
27MHz,26MHz,19.8MHz,19.68MHz,
19.2MHz,15.36MHz,14.4MHz,13MHz,
12MHz,11.2896MHz
DSP or µP
256fs/128fs/64fs/32fs
32fs, 64fs
1fs
MCLK
BCLK
LRCK
SDATA
SDTO
Figure 2. PLL Master Mode
<KM077800>
-2-
2005/02