English
Language : 

AKD4213-B Datasheet, PDF (2/35 Pages) Asahi Kasei Microsystems – AK4213 Evaluation Board Rev.1
„ Outline Chart
Board Outline Chart
[AKD4213-B]
DGND
TVDD
U2
PORT1
1
10
REG/AVDD
T1
AGND
REG
U1
AK4213
J2
HP
mini-jack
74AVC4T245
5
6
U3
CTRL
DGND AGND
AREA AREA
SW1
CN2
CN1
SVDD
J1
LINEIN
mini-jack
74HC14
(BACK)
PDN
RVINN RVINP
RVIN
(No Mount)
SPP SPN
SPK
Figure 1. AKD4213-B Outline Chart
„ Comment
(1) J1, J2 (MINI-JACK)
J1 (LINEIN-JACK): It is analog signal input Jack. The signal is input to LIN1-3 / RIN1-3 pins.
J2 (HP-JACK): It is analog signal output Jack. The signal is output from HPL / HPR pins.
(2) CN1, CN2 (TERMINAL BLOCK)
CN1 (SPK): An analog signal output Terminal Block. The signal is output from SPP / SPN pins.
CN2 (RVIN): An analog signal input Terminal Block. The signal is input to RVINP / RVINN pins. But this is no
mount.
(3) REG / AVDD, TVDD, SVDD, AGND, DGND
These are the power supply connectors. Connect power supply with these pins.
As for the detail comments, refer to the setup of power supply in P3.
(4) PORT1 (10 pin header)
Control port. Connect the bundled cable into this port.
<KM092201>
-2-
2008/04