AK8181D Datasheet, PDF (2/6 Pages) Asahi Kasei Microsystems – AK8181D Evaluation Board

AKD8181D
Power
There are the following three power supplies.
※If you have configured a termination circuit with resistor only (Pattern B or C), it becomes possible to
evaluate even without applying power to the VDD-2V terminal.
- VDD
The core power supply of AK8181D (3.3V)
- VSS
The core power supply of AK8181D (GND)
- VDD-2V Power supply for the end of the output load resistor (=VDD-2V)
Note) GND of the SMA terminal is connected to the VSS inside the substrate.
Clock input
AK8181D inputs the clock selected by CLK_SEL switch. (Differential input or LVPECL)
The clock input signal can terminate if needed.
Input load circuit for interface
It can construct interface load circuit for input differential clock.
Examples are shown below.
The state of initial shipment is 【Pattern c】.
Pattern a
Zo=50Ω
VSS
NC：No components
Pattern b
Zo=50Ω
VSS
Zo=50Ω
VSS
AKD8181D-E-00
Zo=50Ω
VSS
2
2012/12