AK7754 Datasheet, PDF (17/26 Pages) Asahi Kasei Microsystems – Audio DSP with Stereo CODEC + MIC/HP-AMP

[AK7754]
SWITCHING CHARACTERISTICS
■ System Clock
(Ta= -20ºC ~ 85ºC, AVDD=HVDD=DVDD= 3.0V ~ 3.6V, DVDD18= 1.7V ~ 1.9V, VSS1=VSS2=VSS3=VSS4=0V,
CL=20pF)
Parameter
Symbol
min
typ
max
Unit
XTI CKM[2:0]bits=4h-7h
a) with a Crystal Oscillator:
CKM[2:0]bits=6h
CKM[2:0]bits=7h
b) with an External Clock
Duty Cycle
CKM[2:0]bits=4h,6h
CKM[2:0]bits=5h,7h
fXTI
fXTI
fXTI
fXTI
11.2896
12.288
16.9344
18.432
40
50
11.0
11.2896
12.288
16.5
16.9344
18.432
MHz
MHz
60
%
MHz
12.4
MHz
18.6
LRCK1 Frequency @SCKSEL bit=0 (Note 33) fs
8
48
kHz
BICK1 Frequency @SCKSEL bit=0 (Note 34)
High Level Width
Low Level Width
Frequency
tBCLKH
64
tBCLKL
64
fBCLK
0.23
3.072
ns
ns
3.1
MHz
LRCK2 Frequency @SCKSEL bit=1 (Note 35) fs
8
48
KHz
BICK2 Frequency @SCKSEL bit=1 (Note 36)
High Level Width
tBCLKH
64
Low Level Width
tBCLKL
64
Frequency
fBCLK
0.23
3.072
3.1
Note 33. Input LRCK1 frequency is the same as sampling rate (fs).
Note 34. When BICLK1 is used as a master clock reference clock, it should be synchronized with LRCK1.
Note 35. Input LRCK2 frequency is the same as sampling rate (fs).
Note 36. When BICLK2 is used as a master clock reference clock, it should be synchronized with LRCK2.
ns
ns
MHz
■ SRC Input Clock
(Ta= -20ºC ~ 85ºC, AVDD=HVDD=DVDD= 3.0V ~ 3.6V, DVDD18= 1.7V ~ 1.9V, VSS1=VSS2=VSS3=VSS4=0V,
@SCKSEL bit =“0”)
Parameter
Symbol
min
typ
max
Unit
LRCLKI2 Frequency
fs
8
96
kHz
BITCLKI2 Frequency
Frequency
High Level Width
Low Level Width
fBCLK
0.23
tBCLKH
32
tBCLKL
32
3.072
6.2
MHz
ns
ns
MS1138-E-01-PB
17
2012/03