AK7756 Datasheet, PDF (16/27 Pages) Asahi Kasei Microsystems – DSP with Mono CODEC + Mic/Lineout Amp

[AK7756]
■ Digital Audio Interface (SDIN1, SDOUT1, 2)
1) SDIN1/2, SDOUT1/2/3
(Ta= Tmin~Tmax, AVDD=DVDD= 3.0V ~ 3.6V, DVDD18= 1.7V ~ 1.9V, VSS1=VSS2=0V, CL=20pF)
Parameter
I²S and PCM Interface Input Timing
Symbol
min typ max Unit
Delay Time from BICK “↑” to LRCK (Note 30)
tBLRD
20
ns
Delay Time from LRCK to BICK “↑” (Note 30)
tLRBD
20
ns
Serial Data Input Latch Setup Time
tBSIDS
80
ns
Serial Data Input Latch Hold Time
tBSIDH
80
ns
Delay Time from LRCK to Serial Data Output (Note 31)
tLRD
80
ns
Delay Time from BICK “↓” or “↑”to LRCK Output
tBSOD
80
ns
I²S and PCM Interface Output Timing SDOUT1/2
BICK Frequency
fBICK
64
fs
BICK Duty cycle
50
%
Delay Time from BITCLK “↓” to LRCK Output
tMBL
-20
40
ns
Serial Data Input Latch Setup Time
tBSIDS
80
ns
Serial Data Input Latch Hold Time
tBSIDH
80
ns
Delay Time from LRCK to Serial Data Output (Note 31)
tLRD
80
ns
Delay Time from BICK “↓” or “↑”to LRCK Output
tBSOD
80
ns
Note 30. BICK edge must not occur at the same time as LRCK edge.
Note 31. Except I²S.
MS1218-E-00-PB
16
2010/08