AK8973 Datasheet, PDF (15/31 Pages) Asahi Kasei Microsystems – 3-axis Electronic Compass

ASAHI KASEI
[AK8973]
7.1.3. Acknowledge
The IC that is transmitting data releases the SDA line (in the "High" state) after sending 1-byte data.
The IC that receives the data drives the SDA line to "Low" on the next clock pulse. This operation is referred to
acknowledge. With this operation, whether data has been transferred successfully can be checked.
AK8973 generates an acknowledge after reception of a start condition and slave address.
When a WRITE instruction is executed, AK8973 generates an acknowledge after every byte is received.
When a READ instruction is executed, AK8973 generates an acknowledge then transfers the data stored at the
specified address. Next, AK8973 releases the SDA line then monitors the SDA line. If a master IC generates
an acknowledge instead of a stop condition, AK8973 transmits the 8bit data stored at the next address. If no
acknowledge is generated, AK8973 stops data transmission.
Clock pulse
for acknowledge
SCL FROM
MASTER
1
8
9
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
START
CONDITION
not acknowledge
acknowledge
Fig. 03 Generation of Acknowledge
7.1.4. Slave Address
The first byte including a slave address is transmitted after a start condition, and an IC to be accessed is
selected from the ICs on the bus according to the slave address.
A slave address of AK8973 consists of 7 bits. The most significant 5 bits are fixed to "00111". The next 2 bits
are address bits used to select an IC to be accessed, and are set by the CAD1-0 pins.
When a slave address is transferred, the IC whose device address matches the transferred slave address
generates an acknowledge then executes an instruction. The 8th bit (least significant bit) of the first byte is a
R/W bit.
When the R/W bit is set to "1", READ instruction is executed. When the R/W bit is set to "0", WRITE
instruction is executed.
MSB
0
0
LSB
1
1
1 CAD1 CAD0 R/W
Fig. 04 Slave Address
MS0561-E-01 <Preliminary>
- 15 -
2007/01