AK8160B2 Datasheet, PDF (13/16 Pages) Asahi Kasei Microsystems – Low Power & Low Jitter Clock Generator for PCI Express

[AK8160B2]
9. Recommended External Circuits
3.3V (TYP)
L
C3
C1 : 0.1F C2, C3 : 1F ^{L : Bead}
Cext1, Cext2: Depends on crystal characteristic
Refer the specification of the crystal.
Digital
Input
Cext2
C1
Cext1
Crystal
25MHz
15 14 13 12 11
XIN 16
VSS1 17
C1
VDD1 18
REFOUT 19
REFOUT_OE 20
10 PCIE0n
9 PCIE0p
8 PCIE1n
7 PCIE1p
6 VSS4
12345
C1
C2
C1
PCI Express
Device
Reference Output
25MHz
Figure 12 Recommended External Circuits
PCB Layout Consideration
The AK8160B2 is a high-accuracy and low-jitter clock generator. For proper performances specified in this
datasheet, careful PCB layout should be taken. The followings are layout guidelines based on the typical
connection diagram shown in Figure 12
Power supply line & Ground pin connection
AK8160B2 has four power supply pins (VDD1-4) which deliver power to internal circuitry segments.
And AK8160B2 has four ground pins (VSS1-4). These pins require connecting to plane ground which will
eliminate any common impedance with other critical switching signal return.
0.1F decoupling capacitors placed at VDD1, VDD2, VDD3 and VDD4 should be grounded at close to the
VSS1pin, the VSS2 pin, VSS3 pin and the VSS4 pin, respectively.
Crystal connection
Proper oscillation performance are susceptible to stray or parasitic capacitors around crystal. The wiring
traces to a crystal form XIN (Pin 16) and XOUT (Pin 15) have equal lengths with no via and as short in length
as possible. These traces should be also located away from any traces with switching signal.
014003469-E-00
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2014/06