AK4524_12 Datasheet, PDF (13/32 Pages) Asahi Kasei Microsystems – 24Bit 96kHz Audio CODEC

[AK4524]
MCLK(Normal speed)
256fs
512fs
1024fs
384fs
768fs
fs=44.1kHz
11.2896MHz
22.5792MHz
45.1584MHz
16.9344MHz
33.8688MHz
fs=48kHz
12.288MHz
24.576MHz
49.152MHz
18.432MHz
36.864MHz
MCLK(Double speed)
N/A
256fs
512fs
N/A
384fs
fs=88.2kHz
N/A
22.5792MHz
45.1584MHz
N/A
33.8688MHz
fs=96kHz
N/A
24.576MHz
49.152MHz
N/A
36.864MHz
MCLK(4 times speed)
128fs
256fs
192fs
fs=176.4kHz
22.5792MHz
45.1584MHz
33.8688MHz
fs=192kHz
24.576MHz
49.152MHz
36.864MHz
Table 3. Master clock frequency
* X’tal mode operates from 11.2896MHz to 24.576MHz.
* The frequency over 24.576MHz supports only external clock mode.
„ Audio Serial Interface Format
Five serial modes selected by the DIF0 and DIF1 pins are supported as shown in Table 4. In all modes the serial data has
MSB first, 2’s compliment format. The SDTO is clocked out on the falling edge of BICK and the SDTI is latched on the
rising edge. The interface supports both master mode and slave mode. In master mode, BICK and LRCK are outputs and
the frequency of BICK is fixed to 64fs.
Mode
0
1
2
3
4
DIF2
0
0
0
0
1
DIF1
0
0
1
1
0
DIF0
0
1
0
1
0
SDTO
24bit, MSB justified
24bit, MSB justified
24bit, MSB justified
24bit, IIS (I2S)
24bit, MSB justified
SDTI
16bit, LSB justified
20bit, LSB justified
24bit, MSB justified
24bit, IIS (I2S)
24bit, LSB justified
LRCK
H/L
H/L
H/L
L/H
H/L
BICK
≥ 32fs
≥ 40fs
≥ 48fs
≥ 48fs
≥ 48fs
at reset
Table 4. Audio data format
LRCK
01 23
BICK(32fs)
9 10 11 12 13 14 15 0 1 2
SDTO(o)
23 22 21
15 14 13 12 11 10 9 8 23 22 21
9 10 11 12 13 14 15 0 1
15 14 13 12 11 10 9 8 23
SDTI(i)
15 14 13
7 6 5 4 3 2 1 0 15 14 13
7 6 5 4 3 2 1 0 15
01 23
BICK(64fs)
SDTO(o)
23 22 21
17 18 19 20
7 65 43
30 31 0 1 2 3
23 22 21
17 18 19 20
76 5 43
31 0 1
23
SDTI(i)
Don’t Care 15 14 13 12 11 2 1 0 Don’t Care
SDTO-19:MSB, 0:LSB; SDTI-15:MSB, 0:LSB
Lch Data
Figure 1. Mode 0 Timing
15 14 13 12 11 2 1 0
Rch Data
M0050-E-04
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2012/01