AKD4126-A Datasheet, PDF (10/29 Pages) Asahi Kasei Microsystems – digital sample rate converter.

ASAHI KASEI
[AKD4126-A]
„ Set up DIP-switches
(1). Set up input mode
(1)-1. Set up the AK4126 (U1)
• Set up SW1
ON is “H”, and OFF is “L”.
Setting of default (Slave Mode, 24bit MSB justified, IBICK lock mode (64fsi), IBICK=Input,
ILRCK=Input) is as follows. (Please refer to Table 1.)
SW1
No.
1
2
3
4
5
6
Name
PLL2
PLL1
PLL0
IDIF2
IDIF1
IDIF0
ON (“H”)
OFF (“L”)
AK4126 PLL Mode Setting
Please refer to Table 2.
AK4126 Input Audio Interface Format Setting
Please refer to Table 3.
Table 1. SW1 Setting
Default
H
L
H
L
H
L
Mode
0
1
2
3
4
5
6
7
PLL2
pin
L
L
L
L
H
H
H
PLL1
pin
L
L
H
H
L
L
H
PLL0
pin
L
H
L
H
L
H
L
ILRCK
IBICK
Freq
Freq
8k ~ 96kHz
8k ~ 192kHz
16k ~ 192kHz
(Note 1)
Depending
on
IDIF2-0
Reserved
32fsi
(Note 3)
8k ~ 192kHz 64fsi
(Note 2)
128fsi
H
H
H
64fsi
Table2. AK4126 PLL Mode Setting (Input PORT)
SMUTE
Manual
(Note 4)
Semi-Auto
(Note 5)
Manual
(Note 4)
Semi-Auto
(Note 5)
(Default)
(Note 1) PLL lock range is changed by values of R and C connected by FILT pin. For more further details,
please refer to datasheet: “PLL Loop Filter”.
(Note 2) IBICK should be always and continuously supplied, except when clocks are changed.
(Note 3) IBICK = 32fsi is applied to only two audio data formats of 16bit LSB justified and 16bit I²S Compatible.
(Note 4) Please refer to datasheet: “Soft Mute Operation”: “Manual mode”.
(Note 5) Please refer to datasheet: “Soft Mute Operation ”: “Semi-Auto mode”.
Mode IDIF2 IDIF1 IDIF0
SDTI Format
IBICK
pin pin pin
Freq
0
L
L
L
16bit, LSB justified
≥ 32fsi
1
L
L
H
20bit, LSB justified
≥ 40fsi
2
L
H
L 24/20bit, MSB justified
≥ 48fsi
3
L
H
H 24/16bit, I2S Compatible ≥ 48fsi or 32fsi
4
H
L
L
24bit, LSB justified
≥ 48fsi
5
H
L
H
Reserved
6
H
H
L
Reserved
7
H
H
H
Reserved
Table 3. AK4126 Input Audio Interface Format Setting (Input PORT)
(Default)
<KM083203>
- 10 -
2007/01