English
Language : 

AIC1384 Datasheet, PDF (1/15 Pages) Analog Intergrations Corporation – DDR Termination Regulator
FEATURES
Source and Sink Current Capability
Suspend To RAM Functionality
Support DDRŗ (1.25VTT) and DDRŘ (0.9VTT)
Requirements
Low Output Voltage Offset, ±20mV
High Accuracy Output Voltage at Full-Load
Low External Component Count
No external resistor required
Current Limit protection
Thermal Protection
SOP-8 and SOP-8 Exposed Pad (Heat Sink)
Package
APPLICATIONS
Mother board
Graphic cards
DDRŗ and DDRŘ termination voltage
AIC1384
DDR Termination Regulator
DESCRIPTION
The AIC1384 linear regulator is designed to
deliver 1.5A continuous current and up to 3A
peak transient currents for termination of DDR-
SRAM. The AIC1384 contains a high-speed
operational amplifier to supply superior load
transient response. It also includes a VSENSE to
provide excellent load regulation and VREF
output as a reference for the chipset and
DIMMs. The AIC1384 supply accurate VTT and
VREF without external resistors that save PCB
areas.
The AIC1384 also features an active low
shutdown pin that provides Suspend To RAM
(STR) functionality. The VTT will remain high
impedance when in shutdown, but VREF will
keep active. The advantage of power saving
can be obtained through low 150µA (DDRŗ)
quiescent current.
Built in current limiting in source and sink mode,
with thermal shutdown provide maximal
protection to the AIC1384 against fault
conditions.
TYPICAL APPLICATION CIRCUIT
1
SD
2
3
VREF=1.25V
4
10nF
GND
VTT 8
SD
PVIN 7
6
VSENSE AVIN
VREF VDDQ 5
VDDQ=2.5V
AIC1384
VTT=1.25V
Cout
22uF
VIN=2.5V
Cin
47uF
Analog Integrations Corporation
Si-Soft Research Center
3A1, No.1, Li-Hsin Rd. I , Science Park , Hsinchu 300, Taiwan , R.O.C.
TEL: 886-3-5772500
FAX: 886-3-5772510 www.analog.com.tw
DS-1384G-01 073108
1