UT54ACS164245SEI Datasheet, PDF (1/16 Pages) Aeroflex Circuit Technology – Schmitt CMOS 16-bit Bidirectional MultiPurpose Transceiver

UT54ACS164245SEI
Schmitt CMOS 16-bit Bidirectional MultiPurpose Transceiver
Datasheet
July, 2010
www.aeroflex.com/16BitLogic
FEATURES
• Flexible voltage operation
- 5V bus to 3.3V bus; 5V bus to 5V bus
- 3.3V bus to 5V bus; 3.3V bus to 3.3V bus
• Cold sparing
- 1MΩ minimum input impedance power-off
• Warm sparing
- Guaranteed output tri-state while one power supply is "off"
and the other is "on"
- 1MΩ minimum input impedance power-off
• 0.6μm CRH CMOS Technology
• Operational Environment:
- Total dose: 100 krads(Si)
- Single Event Latchup immune
• High speed, low power consumption
• Schmitt trigger inputs to filter noisy signals
• Available QML Q or V processes
• Standard Microcircuit Drawing 5962-98580
- Device Types 06 and 07
• Package:
- 48-lead flatpack, 25 mil pitch (.390 x .640), wgt 1.4 grams
DESCRIPTION
The 16-bit wide UT54ACS164245SEI MultiPurpose transceiv-
er is built using Aeroflex’s CRH technology. This high speed,
low power UT54ACS164245SEI transceiver is designed to per-
form multiple functions including: asynchronous two-way
communication, schmitt input buffering, voltage translation,
cold and warm sparing. With either or both V_DD1 and V_DD2 are
equal to zero volts, the UT54ACS164245SEI outputs and inputs
present a minimum impedance of 1MΩ making it ideal for "cold
spare" applications. Balanced outputs and low "on" output im-
pedance make the UT54ACS164245SEI well suited for driving
high capacitance loads and low impedance backplanes. The
UT54ACS164245SEI enables system designers to interface 3.3
volt CMOS compatible components with 5 volt CMOS compo-
nents. For voltage translation, the A port interfaces with the 3.3
volt bus; the B port interfaces with the 5 volt bus. The direction
control (DIRx) controls the direction of data flow. The output
enable (OEx) overrides the direction control and disables both
ports. These signals can be driven from either port A or B.
The direction and output enable controls operate these devices
as either two independent 8-bit transceivers or one 16-bit trans-
ceiver.
LOGIC SYMBOL
OE1 (48)
OE2 (25)
(1)
DIR1
G1
G2
2EN1 (BA)
2EN2 (AB)
1EN1 (BA)
1EN2 (AB)
(47)
1A1
(46)
1A2
(44)
1A3
(43)
1A4
(41)
1A5
(40)
1A6
(38)
1A7
(37)
1A8
(36)
2A1
2A2 ⁽³⁵⁾
(33)
2A3
(32)
2A4
(30)
2A5
(29)
2A6
2A7 ⁽²⁷⁾
(26)
2A8
11
12
21
22
(24)
DIR2
(2)
1B1
(3)
1B2
(5)
1B3
(6)
1B4
(8)
1B5
(9)
(11) ^1B6
1B7
(12)
(13) ^1B8
2B1
(14)
2B2
(16)
2B3
(17)
2B4
(19)
2B5
(20)
(22)
2B6
2B7
(23)
2B8
1