ADV7182 Datasheet, PDF (82/96 Pages) Analog Devices – 10-Bit, SDTV Video Decoder with Differential Inputs

ADV7182
Data Sheet
Subaddress
0xF8
Register
IF comp
control
Bit Description
IFFILTSEL[2:0]; IF filter selection
for PAL and NTSC
Reserved
0xF9
VS mode
EXTEND_VS_MAX_FREQ
control
EXTEND_VS_MIN_FREQ
VS_COAST_MODE[1:0]
0xFB
Peaking gain
Reserved
PEAKING_GAIN[7:0]
0xFC
0xFE
DNR Noise
Threshold 2
CSI Tx slave
address
DNR_TH2[7:0]
Reserved
CSI_TX_SLAVE_ADDR[6:0]
1 _{x indicates a bit that keeps the last written value.}
Bits
(Shading Indicates Default State)
765 4 3 2 1 0
000
Comments
Bypass mode
Notes
0 dB
2 MHz NTSC Filters
0 0 1 −3 dB
0 1 0 −6 dB
0 1 1 −10 dB
1 0 0 Reserved
3 MHz PAL Filters
1 0 1 −2 dB
1 1 0 −5 dB
1 1 1 −7 dB
0000 0
0 Limits maximum VSYNC
frequency to 66.25 Hz
(475 lines/frame)
1 Limits maximum VSYNC
frequency to 70.09 Hz
(449 lines/frame)
0
Limits minimum VSYNC
frequency to 42.75 Hz
(731 lines/frame)
1
Limits minimum VSYNC
frequency to 39.51 Hz
(791 lines/frame)
00
01
10
11
Autocoast mode
576i 50 Hz coast mode
480i 60 Hz coast mode
Reserved
This value forces the
video standard
output during free-
run mode
0000
0 1 0 0 0 0 0 0 Increases/decreases the gain for
high frequency portions of the
video signal
0 0 0 0 0 1 0 0 Specifies the maximum luma edge
that is interpreted as noise and
therefore blanked
0 Reserved
0000 000
Programs the I²C address of the
MIPI CSI TX
Rev. A | Page 82 of 96