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ADAU1777 Datasheet, PDF (81/108 Pages) Analog Devices – Four-ADC, Two-DAC, Low Power Codec with Audio Processor
Data Sheet
Table 77. Bit Descriptions for PGA_10DB_BOOST
Bits Bit Name
Settings Description
[7:4] RESERVED
Reserved.
3
PGA_3_BOOST
Boost control for PGA3.
0 Default PGA gain set in Register PGA_CONTROL_3.
1 Additional 10 dB gain above setting in Register PGA_CONTROL_3.
2
PGA_2_BOOST
Boost control for PGA2.
0 Default PGA gain set in Register PGA_CONTROL_2.
1 Additional 10 dB gain above setting in Register PGA_CONTROL_2.
1
PGA_1_BOOST
Boost control for PGA1.
0 Default PGA gain set in Register PGA_CONTROL_1.
1 Additional 10 dB gain above setting in Register PGA_CONTROL_1.
0
PGA_0_BOOST
Boost control for PGA0.
0 Default PGA gain set in Register PGA_CONTROL_0.
1 Additional 10 dB gain above setting in Register PGA_CONTROL_0.
INPUT AND OUTPUT CAPACITOR CHARGING REGISTER
Address: 0x29, Reset: 0x3F, Name: POP_SUPPRESS
ADAU1777
Reset
0x0
0x0
Access
R/W
R/W
0x0
R/W
0x0
R/W
0x0
R/W
Table 78. Bit Descriptions for POP_SUPPRESS
Bits Bit Name
Settings Description
[7:6] RESERVED
Reserved.
5
HP_POP_DIS1
Disable pop suppression on Headphone Output 1.
0 Enabled.
1 Disabled.
4
HP_POP_DIS0
Disable pop suppression on Headphone Output 0.
0 Enabled.
1 Disabled.
3
PGA_POP_DIS3
Disable pop suppression on PGA3 input.
0 Enabled.
1 Disabled.
2
PGA_POP_DIS2
Disable pop suppression on PGA2 input.
0 Enabled.
1 Disabled.
Rev. 0 | Page 81 of 108
Reset
0x0
0x1
Access
R/W
R/W
0x1
R/W
0x1
R/W
0x1
R/W