UG-207 Datasheet, PDF (8/16 Pages) Analog Devices – Evaluation Board for 1 GSPS DDS with 14-Bit DAC

UG-207
System Clock displays the operating frequency the DDS core
(system). The value shown is derived from the values entered in
the External Clock text box and the Multiplier spin box.
Refer to the AD9910 data sheet for more information regarding
clock modes and operation.
Setting the I/O Update Options
Use Internal IO Update sets the I/O update pin to an output.
This output generates an active high pulse when the internal
I/O update occurs. The rate of the internal I/O update can be
programmed through the serial port. Refer to the AD9910 data
sheet for more information.
Power Down Digital, DAC, Clock Input, and Aux DAC
These power-down controls allows you to power down each of
the specific circuit blocks individually.
External PD Mode allows you to control which power-down
mode is used in conjunction with the External Power Down
Pin button. The Fast Recovery mode sets the AD9910 into a
power-down state that keeps clocks running and bias circuits
active, but does not allow the part to output data. This mode
uses significantly more power than the Full Power Down
mode. The Full Power Down mode stops clocks and powers
down bias circuits. This mode takes significantly longer to
power back up from a power-down state.
The External Power Down Pin button allows you to control the
EXT_PWR_DWN (external power-down) pin without having
to alter the evaluation board. See the AD9910 data sheet for
more information about power down conditions.
AUX DAC Control
DAC Gain Ctrl controls the auxiliary DAC setting to select the
full-scale output current of the DAC. See the AD9910 data sheet
for more information about DAC gain setting.
DAC Iout displays the full-scale output current of the DAC.
This number is based on a DAC_RSET resistor value of 10 kΩ.
Evaluation Board User Guide
Setting Other Control Window Options
Enable I/O Sync Clock Output Pin allows you to enable or
disable the output driver for the I/O sync clock output.
Enable Matched Latency allows you to align the application of
the frequency tuning word, the phase offset word, and the
amplitude scale factor at the same time. If this bit is cleared,
then those words are not applied simultaneously.
Auto Clear Phase Accumulator sets the DDS phase accumulator
to a reset state when the I/O update pin is set high or when a
profile changes.
Clear Phase Accumulator holds the DDS phase accumulator in
a reset state as long as this bit (Bit 11) is set.
The Show Warnings check box can be cleared to have the
AD9910 evaluation board software suppress any warnings
about the operation of the AD9910. For example, a warning
appears if you try to program the VCO or PLL to a state that is
not recommended in the AD9910 data sheet.
Loading Data
The LOAD button is used to send data to the AD9910. All
LOAD buttons found in the evaluation software have the same
functionality.
When new data is detected, LOAD flashes orange, indicating
that you need to click LOAD to send the updates to the serial
I/O buffer where they are stored until an I/O update is issued.
The I/O update sends the contents of the serial I/O buffer to
active registers.
I/O updates can be sent manually or automatically. By default,
the AD9910 evaluation software is set to auto-I/O update, so
that when LOAD is clicked, an I/O update signal is automati-
cally sent to the device. If synchronization across channels is
desired, clear the Auto check box on the toolbar and click the
I/O Update button (see Figure 4) when you wish to send an
I/O update.
The Show Warnings check box, located above LOAD, can be
selected to display warnings when you have entered data that
exceeds the specifications of the AD9910.
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