UG-207 Datasheet, PDF (7/16 Pages) Analog Devices – Evaluation Board for 1 GSPS DDS with 14-Bit DAC

Evaluation Board User Guide
CONTROL WINDOW
UG-207
Figure 5. Control Window
The Control window provides control of the clock input, clock
multiplier, DAC gain settings, internal I/O update, and power-
down functions of the AD9910 (see Figure 5).
Configuring the Reference Clock Path
The Clock section allows you to configure the reference clock
path in the AD9910.
External Clock inputs the operating frequency of the external
reference clock or crystal. The maximum reference clock frequency
of the AD9910 is 1 GHz. The default setting is 100 MHz. A red
outline indicates that the value entered is out of range.
Enable Multiplier selects the PLL multiplication factor (12× to
127×) by which to scale the input frequency. The default setting
of this box is disabled (check box cleared), indicating that the
reference clock multiplier circuitry is bypassed and the reference
clock/crystal (REFCLK) input is piped directly to the DDS core.
CP Current selects the charge pump current output of the PLL
in the reference clock multiplier circuitry. Selecting a higher
current output results in the loop locking faster, but there is a
trade-off. Increasing this current output also increases phase
noise. The default setting of this drop-down box is 387 μA.
VCO Range allows you to select the range of operation for the
VCO on the AD9910. The AD9910 evaluation software automati-
cally determines which range the AD9910 should operate in.
However, if you prefer to run a given frequency in a band other
than the one selected by the software, a warning box prompts
you to confirm this. Note that using a VCO frequency outside
of its specified range may result in undesired operation, including
nonfunctionality. See the AD9910 data sheet for more informa-
tion regarding the different VCO bands.
XTAL Out selects the output drive strength of the XTAL reference
output. There are three drive strengths and a disable mode.
PLL Lock indicates when the PLL is in a valid lock state. If the
PLL falls out of lock, the indicator light display illuminates. The
Refresh button allows you to poll the AD9910 to refresh the PLL
Lock flag.
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