SSM2120 Datasheet, PDF (8/12 Pages) Analog Devices – Dynamic Range Processors/Dual VCA

SSM2120/SSM2122
DYNAMIC FILTER
Figure 12 shows a control circuit for a dynamic filter capable of
single ended (nonencode/decode) noise reduction. Such circuits
usually suffer from a loss of high frequency content at low signal
levels because their control circuits detect the absolute amount
of highs present in the signal. This circuit, however, measures
wideband level as well as high frequency band level to produce
a composite control signal combined in a 1:2 ratio respectively.
The upper detector senses wideband signals with a cutoff of
20 Hz while the lower detector has a 5 kHz cutoff to sense only
high frequency band signals. This approach allows very good
noise masking with a minimum loss of “highs” when the signal
level goes below the threshold.
AUDIO
INPUT
10kΩ ^2.2µF REC_IN
9
F_C ≤ 20Hz
(WIDEBAND)
|I_IN|
3.3µF
V+ _THRESHOLD
CONTROL
V–
160kΩ THRESH
1kΩ ¹
39kΩ CON_OUT 12kΩ
3
LOG AV
2
1.5MΩ
V–
10kΩ ^3300pF REC_IN
15
F_C = 5kHz
(HIGH FREQUENCY)
|I_IN|
3.3µF
V–
160kΩ
V+
LOG AV
13
1.5MΩ
THRESH
1kΩ ¹²
V–
39kΩ CON_OUT 5.6kΩ
14
200Ω
5 +V_C
V–
36kΩ
SIG_IN
8
47Ω
2200pF
7 –V_C
200Ω
36kΩ
SIG_OUT
5
36kΩ
36kΩ
100pF
AUDIO
OUTPUT
Figure 12. Dynamic Noise Filter Circuit
–8–
REV. C