AD9522-5 Datasheet, PDF (66/76 Pages) Analog Devices – 12 LVDS/24 CMOS Output Clock Generator

AD9522-5
Reg.
Addr
(Hex) Bit(s) Name
Description
Level or
Dynamic
[4] [3] [2] [1] [0] Signal Signal at REFMON Pin
1 0 1 0 1 LVL
Status of selected reference (status of differential reference);
active low.
1 0 1 1 0 LVL
Status of unselected reference (not available in differential mode);
active low.
1 0 1 1 1 LVL
Status of REF1 frequency (active low).
1 1 0 0 0 LVL
Status of REF2 frequency (active low).
1 1 0 0 1 LVL
(Status of REF1 frequency) AND (status of REF2 frequency).
1 1 0 1 0 LVL
(DLD) AND (status of selected reference) AND (status of CLK).
1 1 0 1 1 LVL
Status of CLK frequency (active low).
1 1 1 0 0 LVL
Selected reference (low = REF2, high = REF1).
1 1 1 0 1 LVL
DLD; active low.
1 1 1 1 0 LVL
Holdover active (active low).
1 1 1 1 1 LVL
LD pin comparator output (active low).
01C [7]
Disable
switchover
deglitch
Disables or enables the switchover deglitch circuit.
[7] = 0; enable the switchover deglitch circuit (default).
[7] = 1; disable the switchover deglitch circuit.
01C [6] Select REF2
If Register 0x01C[5] = 0, selects the reference for PLL when in manual; register selected reference control.
[6] = 0; select REF1 (default).
[6] = 1; select REF2.
01C [5] Use REF_SEL
pin
If Register 0x01C[4] = 0 (manual), sets the method of PLL reference selection.
[5] = 0; use Register 0x01C[6] (default).
[5] = 1; use REF_SEL pin.
01C [4]
Enable
automatic
reference
switchover
Automatic or manual reference switchover. Single-ended reference mode must be selected by
Register 0x01C[0] = 0.
[4] = 0; manual reference switchover (default).
[4] = 1; automatic reference switchover.
Setting this bit also powers on REF1 and REF2, and overrides the settings in Register 0x01C[2:1].
01C [3] Stay on REF2 Stays on REF2 after switchover.
[3] = 0; return to REF1 automatically when REF1 status is good again (default).
[3] = 1; stay on REF2 after switchover. Do not automatically return to REF1.
01C [2] Enable REF2 This bit turns the REF2 power on. This bit is overridden when automatic reference switchover is enabled.
[2] = 0; REF2 power off (default).
[2] = 1; REF2 power on.
01C [1] Enable REF1 This bit turns the REF1 power on. This bit is overridden when automatic reference switchover is enabled.
[1] = 0; REF1 power off (default).
[1] = 1; REF1 power on.
01C [0]
Enable
differential
reference
Selects the PLL reference mode, differential or single-ended. Register 0x01C[2:1] should be cleared when
this bit is set.
[0] = 0; single-ended reference mode (default).
[0] = 1; differential reference mode.
01D [7]
Enable
Enables the Status_EEPROM signal at the STATUS pin.
Status_EEPROM _{[7] = 0; the STATUS pin is controlled by the 0x017[7:2] selection.}
at STATUS pin _{[7] = 1; select the Status_EEPROM signal at STATUS pin. This bit overrides 0x017[7:2] (default).}
01D [6] Enable
XTAL OSC
Enables the maintaining amplifier needed by a crystal oscillator at the PLL reference input.
[6] = 0; crystal oscillator maintaining amplifier disabled (default).
[6] = 1; crystal oscillator maintaining amplifier enabled.
Rev. 0 | Page 66 of 76