AD9549 Datasheet, PDF (62/78 Pages) Analog Devices – Dual Input Network Clock Generator/Synchronizer

AD9549
Preliminary Technical Data
0300
0300 RO
0301 RO
0302 RO
0303 RO
0304
0305
0306
0307
0308
0309
030A
030B
030C
030E RO
Monitor
Status
PFD Freq PFD Freq Freq. Est.
too High too Low
Done
Ref
Selected
Free Run
Ph. Lock Freq. Lock
Detected Detected
N/A
RefA
Valid
RefA LOR
RefA
OOL
RefB
Valid
RefB
LOR
RefB OOL N/A
IRQ Status
PFD Freq PFD Freq Freq. Est.
too High too Low
Done
Ref
Selected
Free Run
Ph. Lock Freq. Lock
Detected Detected
00
RefA
Valid
RefA LOR
RefA
OOL
RefB
Valid
RefB
LOR
RefB OOL 00
Ref.
Leave Enter Free
Changed Free Run
Run
00
IRQ Mask
RefA
Valid
Freq Est
Done
!RefA
Valid
Phase
Unlock
RefA LOR
Phase
Lock
!RefA
LOR
Freq.
Unlock
Freq. Lock
00
RefA
OOL
!RefA
OOL
00
RefB
Valid
!RefB
Valid
RefB LOR
!RefB
LOR
RefB
OOL
!RefB
OOL
00
S1 Pin
Config
Ref?
Ref? LOR Ref? OOL
Ref? Not
Valid
Phase
Lock
Freq.
Lock
IRQ
60
S2 Pin
Config
Ref?
Ref? LOR Ref? OOL
Ref? Not
Valid
Phase
Lock
Freq.
Lock
IRQ
E0
S3 Pin
Config
Ref?
Ref? LOR Ref? OOL
Ref? Not
Valid
Phase
Lock
Freq.
Lock
IRQ
08
S4 Pin
Config
Control
Ref?
Ref? LOR
Enable
RefA LOR
Enable
RefA
OOL
Ref? OOL
Enable
RefB LOR
Ref? Not
Valid
Enable
RefB
OOL
Phase
Lock
Freq.
Lock
IRQ
01
Enable
Enable
Phase Freq. Lock A2
Lock Det. Detector
N/A
030F RO
0310 RO
0311 RO
HFTW
N/A
Average or Instantaneous FTW [47:0]
N/A
(read-only)
(An IO_UPDATE is required to refresh these registers.)
N/A
0312 RO
N/A
0313 RO
N/A
0314 M
FF
0315 M
00
Phase Lock Threshold [31:0]
0316 M Phase Lock
00
0317 M
00
0318 M
Phase Unlock Watchdog Timer [2:0]
Phase Lock Watchdog Timer [4:0]
FF
Rev. PrA | Page 62 of 78