AD7172-4_17 Datasheet, PDF (61/62 Pages) Analog Devices – ADC with True Rail-to-Rail Buffers

AD7172-4
Data Sheet
GAIN REGISTER 0
Address: 0x38, Reset: 0x5XXXX0, Name: GAIN0
The gain (full-scale) registers are 24-bit registers that compensate for any gain error in the ADC or in the system.
Table 42. Bit Descriptions for GAIN0
Bits Bit Name
Settings
[23:0] GAIN0
Description
Gain calibration coefficient for Setup 0.
Reset
Access
0x5XXXX0 RW
GAIN REGISTER 1 TO GAIN REGISTER 7
Address: 0x39 to 0x3F, Reset: 0x5XXXX0, Name: GAIN1 to GAIN7
The remaining seven gain registers share the same layout as Gain Register 0.
Table 43. GAIN1 to GAIN7 Register Map
Reg. Name Bits
0x39 GAIN1 [23:0]
0x3A GAIN2 [23:0]
0x3B GAIN3 [23:0]
0x3C GAIN4 [23:0]
0x3D GAIN5 [23:0]
0x3E GAIN6 [23:0]
0x3F GAIN7 [23:0]
GAIN1[23:0]
GAIN2[23:0]
GAIN3[23:0]
GAIN4[23:0]
GAIN5[23:0]
GAIN6[23:0]
GAIN7[23:0]
Reset
RW
0x5XXXX0 RW
0x5XXXX0 RW
0x5XXXX0 RW
0x5XXXX0 RW
0x5XXXX0 RW
0x5XXXX0 RW
0x5XXXX0 RW
Rev. B | Page 60 of 61