AD7172-4_17 Datasheet, PDF (19/62 Pages) Analog Devices – ADC with True Rail-to-Rail Buffers

AD7172-4
Data Sheet
GETTING STARTED
The AD7172-4 offers the user a fast settling, high resolution,
multiplexed ADC with high levels of configurability, including
the following features:
 Four fully differential or eight single-ended analog inputs.
 A crosspoint multiplexer that selects any analog input
combination as the input signals to be converted, routing
them to the modulator positive or negative input.
 True rail-to-rail buffered analog and reference inputs.
 Fully differential inputs or single-ended inputs relative to
any analog input.
 Per channel configurability—up to eight different setups
can be defined. A separate setup can be mapped to each of
the channels. Each setup allows the user to configure
whether the buffers are enabled or disabled, gain and offset
correction, filter type, output data rate, and reference
source selection.
The AD7172-4 includes two separate linear regulator blocks for
both the analog and digital circuitry. The analog LDO regulator
regulates the AVDD2 supply to 1.8 V, supplying the ADC core.
Tie the AVDD1 and AVDD2 supplies together for the easiest
connection. If there is already a clean analog supply rail in the
system in the range of 2 V (minimum) to 5.5 V (maximum), the
user can choose to connect this supply to the AVDD2 input,
allowing lower power dissipation.
SEE THE BUFFERED ANALOG INPUT SECTION
FOR FURTHER DETAILS.
VIN
4.7µF 0.1µF
1
2 _VIN
3
NC 7
ADR44xBRZ
4 _GND
5
V_OUT 6
8
0.1µF
4.7µF 0.1µF
16MHz
CX1
CX2
1 AIN0/REF2–
2 AIN1/REF2+
27 AIN6
28 AIN7
29 AIN8
XTAL1 9
XTAL2/CLKIO 10
DOUT/RDY 11
AD7172-4
DIN 12
SCLK 13
CS 14
ERROR 15
SYNC 16
IOVDD 17
DGND 18
OPTIONAL EXTERNAL
CRYSTAL CIRCUITRY
CAPACITORS
DOUT/RDY
DIN
CLKIN
OPTIONAL
EXTERNAL
CLOCK
INPUT
SCLK
CS
ERROR
SYNC
IOVDD
0.1µF
32 REF+
31 REF–
REGCAPD 19
0.1µF 1µF
AVDD1 6
0.1µF
AVDD2 7
0.1µF
AVDD1
AVDD2
AVSS
5
REGCAPA 4
0.1µF
1µF
Figure 39. Typical Connection Diagram
Rev. B | Page 18 of 61