SSM2110_15 Datasheet, PDF (6/11 Pages) Analog Devices – TRUE RMS TO DC CONVERTER

AHALOGDEVICES fAX-OH-DEHAHD HOTLIHE
SSM-2110
- Page 21
LINEAR OUTPUTS (ABSOLUTE VALUE AND RMS)
The instantaneous absolute value ofthe inputsignal appears as
a current absolute value pin (pin 1). The true RMS value of the
input signal similarly appears as a current into the RMS pin (pin
5). With :t:15 volt supplies. the voltage compliance on these
outputs is trom T 15 to -6 volts. For simple applications it is
possible to convert these currents to negative output voltages
by connecting a resistor in series with the pin(s) to ground (see
input op amp is used. In Figure 4, this capacitor (CAVGc)an be
made large to obtain an average ofthe absolute value output. If
the averaging circuit is implemented then R'Ncan be increased
to a maximum of 10kQ since the 1.5mA peaks will no longer be
present.
Ifthe signal levels being processed are less than 3mAp.pthen the
above mentioned feedback resistors can be increased accord-
ingly.
Figure 3). For a maximum 3mAp-p input signal, the resistor(s)
value should be 4.0kQ or less. To obtain an average of the abso-
lute value output, capacitor CAva can be added in parallel with
RAV'
The circuits in Figures 1 and 4 can be connected at the same
time providing the userwith multiple functions from a single SSM-
2110. RIN' RAMSand RAVshould be set so that clipping does not
occur.
More commonly, a positive going voltage at tow impedance is
The linear output pins must be kept within their voltage compli-
desired as an output. This can be accomplished by connecting a
ance range for proper device operations. An unused linear out.
linear output pin to the virtual ground of an op amp configured as
put must always be terminated. preferably to ground.
a current-to-voltage converter (see Figures 1 and 4). The scale
OBSOLETE lactorforthe conversion isdetermined bythe value ofR'Nand the
feedback resistor (RRMSor RAv)'
For the absolute value circuit in Figure 4. a maximum feedback
resistor (RAv)of BkQ allows maximum swing of the SSM-2131
output amplifier. Given a maximum output signal of 1.5mApEAK
the SSM-2131 willbe able to swing to +12V. Ifvalues larger than
BkQ are used. then signal clipping may result.
For the RMS output circuit in Figure 1. the maximum feedback
resistor (RAMS)can be 10kQ since the RMS level should never
exceed 1.2mA.
A peak output can be implemented by using the circuit in Figure
5. The output scale factor is determined by Rour'R'N' The decay
time constant is equal to the product ROVTCHOLFOo' r this circuit,
the feedback resistor (ROUT)should be kept below SkQ.
A small capacitor (10pF) is usually added in parallel with the
feedback resistor for stability particularly ita high slew rate JFET
LOG OUTPUTS (LOGRMS AND LOGABSVAL)
The log of the instantaneous absolute value and the log of true
RMS of the input signal appears as voltages on pins 2 and 6
respectively. However, these outputs must be buffered. level
shifted and. in many applications, temperature compensated in
order to be made useful.
The log recovery transistor is an internal level shifting compo-
nent which may be switched between the two log outputs. This
will reference the log output(s) to the internal voltage regulator
which is about 7.5V above the negative supply (see Figure 6).
Figures 6.7, and 8 show the recommended connection between
the log output transistor Q~ or °10' and the log recovery transis-
tor °11' Note that although the log recovery transistor can be
switched between the two log outputs, only one log output can
be recovered at a time. With the resistor values RREF1and AREF2
shown, the output swing at the emitter of 0" over the dynamic
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FIGURE6: Log Recovery Circuit
1.