SSM2110_15 Datasheet, PDF (3/11 Pages) Analog Devices – TRUE RMS TO DC CONVERTER

ANALOGDEVICES fAX-ON-DEMAND HOTLINE - Page 18
SSM-2110
ELECTRICAL CHARACTERISTICS at Vs ",:t 15V, TA'" +25°C and RSCALE'" 4.7kil, unless otherwise noted. Continued
SSM-2110
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
Positive Supply Current
Is+
NegativeSupply Current
Is-
SupplyVoltageRange
Vs
"N-O
480
-
920
2.1
-
3.3
:1:12
-
:tIS
UNITS
uA
mA
V
Specifications subject to change; consult latest data sheet.
IOpf
ABSOLUTE
~2
VALUE
PREBIAS
._{- - - - - - -}
~11 _'IN
I
"'" C...
A.....
LOGA8SVAl
INPUT
. f--o V,N
~VI1f;'
.I$V
41GND
-=-
v.p!
12
v- ¹⁴
C- ~'A_....
.15V
~ O.I"F
-15V
v-
a Loa-
13
CfIIIS
~O.'"F
1 IIAtE
LOG SCALE 12
. EMITTER
-LOG IN ¹¹
O ^r-=-
II LOG OUT
.LOG IN ¹⁰
B 'OP11OHAL PREBIAS COtoINECTlON, SEE TEXT
VA"S'V_.~
S R",
TYPICAL VALUES,
O^"1N-IOIen
RAIlS' 10111}
CIM' O""F
L ^C_slpF
ETE _{FIGURE1: RMS OutputCircuit}
I
THE RMS COMPUTING LOOP
The RMS section of the SSM-211 0 consists of an implicit RMS
computing loop whose output follows the equation:
10 '" IIN2
10
where 10 is the average of 10
The time constant for averaging is determined by the value of
the averaging capCRMS (on pin 13) and an internal resistor whose
effective value is 1O.8ka. A very low leakage capacitor must be
used for CAMSto prevent limiting the dynamic range.
Increasing the value of CAMSwill result in lower levels of ripple on
the RMS Output at the expense of an increase in settling time for
a step change in the input signal amplitude. This is a proportional
relationship where increasing the value of CAMStenfold results in
a tenfold increase in the settling time.
Forthe circuit in Figure 1, the peak-to-peak ripple approximately
follows the equation:
- ^VRIPPlE(p-p) =
212 x VRMS
RRMS
x
47tf R1NTCRMS
RIN
where RINT '" 10.8kil
The settling time ofthe SSM-2110 also depends on the frequency
of the signal being processed. It takes approximately 1OOmsfor
a 30°I-lAp-p, 50Hz signal to settle within 0.1 % when CAMS'" 1~F,
and it takes 10ms for a 500Hz signal to settle within the same
value. The general rule is a tenfold increase in frequency causes
a tenfold reduction in settling time. The settling time also varies
with the amplitude of the signal. The larger the signa! level the
faster the settling time.