AD9381_15 Datasheet, PDF (6/44 Pages) Analog Devices – HDMI Display Interface

AD9381
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND 1
GREEN 7 2
GREEN 6 3
GREEN 5 4
GREEN 4 5
GREEN 3 6
GREEN 2 7
GREEN 1 8
GREEN 0 9
V_DD 10
GND 11
BLUE 7 12
BLUE 6 13
BLUE 5 14
BLUE 4 15
BLUE 3 16
BLUE 2 17
BLUE 1 18
BLUE 0 19
MCLKIN 20
MCLKOUT 21
SCLK 22
LRCLK 23
I²S3 24
I²S2 25
PIN 1
AD9381
TOP VIEW
(Not to Scale)
75 GND
74 NC
73 NC
72 V_D
71 NC
70 NC
69 GND
68 NC
67 V_D
66 NC
65 GND
64 GND
63 GND
62 GND
61 GND
60 GND
59 PV_DD
58 GND
57 FILT
56 PV_DD
55 GND
54 PV_DD
53 GND
52 PU1
51 PU2
NC = NO CONNECT
Table 5. Complete Pinout List
Pin Type
Pin No.
INPUTS
81
DIGITAL VIDEO DATA INPUTS 35
34
38
37
41
40
DIGITAL VIDEO CLOCK INPUTS 43
44
OUTPUTS
92 to 99
2 to 9
12 to 19
89
87
85
86
84
Figure 2. Pin Configuration
Mnemonic
PWRDN
Rx0+
Rx0−
Rx1+
Rx1−
Rx2+
Rx2−
RxC+
RxC−
RED [7:0]
GREEN [7:0]
BLUE [7:0]
DATACK
HSOUT
VSOUT
SOGOUT
O/E FIELD
Function
Power-Down Control
Digital Input Channel 0 True
Digital Input Channel 0 Complement
Digital Input Channel 1 True
Digital Input Channel 1 Complement
Digital Input Channel 2 True
Digital Input Channel 2 Complement
Digital Data Clock True
Digital Data Clock Complement
Outputs of Red Converter, Bit 7 is MSB
Outputs of Green Converter, Bit 7 is MSB
Outputs of Blue Converter, Bit 7 is MSB
Data Output Clock
HSYNC Output Clock (Phase-Aligned with DATACK)
VSYNC Output Clock (Phase-Aligned with DATACK)
SOG Slicer Output
Odd/Even Field Output
Rev. 0 | Page 6 of 44
Value
3.3 V CMOS
TMDS
TMDS
TMDS
TMDS
TMDS
TMDS
TMDS
TMDS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD