ADSP-2195 Datasheet, PDF (52/68 Pages) Analog Devices – DSP Microcomputer

35(/,0,1$5< 7(&+1,&$/ '$7$
ADSP-2195
For current information contact Analog Devices at 800/262-5643
September 2001
Output Drive Currents

Figure 27 shows typical I-V characteristics for the output

drivers of the ADSP-2195. The curves represent the current

drive capability of the output drivers as a function of output

voltage.

Power Dissipation

Total power dissipation has two components, one due to

internal circuitry and one due to the switching of external
±
output drivers. Internal power dissipation is dependent on
±
the instruction execution sequence and the data operands
±
7%'
involved. Using the current current-versus-operation infor-
±
mation in Table 23, designers can estimate the
±
ADSP-2195’s internal power supply (V_DDINT) input current
for a specific application, according to the formula in
± 








6285&( 9_''(;7 92/7$*( ± 9
Figure 28.
Figure 27. ADSP-2195 Typical Drive Currents
Table 23. ADSP-2195 Operation Types Versus Input Current
Activity
I_DD(mA)¹
CCLK = 80 MHz
I_DD (mA)¹
CCLK = 160 MHz
Core
Peripheral
Core
Peripheral
Power down²
Idle 1³
Idle 2⁴
Typical⁵
Peak⁶
0
0
0
3
0
30
95
30
112
30
0
0
0
5
0
60
184
60
215
60
1_{Test conditions: VDD= 2.50 V; HCLK (peripheral clock) frequency = CCLK/2 (core clock/2) frequency; TAMB = 25 ºC.}
2_{PLL, Core, peripheral clocks, and CLKIN are disabled.}
3_{PLL is enabled and Core and peripheral clocks are disabled.}
4_{Core CLK is disabled and peripheral clock is enabled. This is a power- down interrupt mode. The timer can be used to generate an interrupt to enable the}
Core clock.
5_{All instructions execute from internal memory. 100% of the instructions are MAC with dual operand addressing, with changing data fetched using a linear}
address sequence, and 50% of the instructions move data from PM to a data register.
6_{All instructions execute from internal memory. 50% of the instructions are repeat MACs with dual operand addressing, with changing data fetched using}
a linear address sequence.
I_DDINT= (%Typical × I_DD-TYPICAL) + (%Idle × I_DD-IDLE) + (%Powerdown × I_DD-PWRDWN)
Figure 28. I_DDINT Calculation
The external component of total power dissipation is caused
by the switching of output pins. Its magnitude depends on:
• The number of output pins that switch during each cycle
(O)
• The maximum frequency at which they can switch (f)
• Their load capacitance (C)
• Their voltage swing (V_DD)
and is calculated by the formula in Figure 29.
52
This information applies to a product under development. Its characteristics and specifications are subject to change with-
REV. PrA
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.