SSM2160_03 Datasheet, PDF (5/16 Pages) Analog Devices – 6-Channel, Serial Input Master/Balance Volume Controls

Pin No.
1
2
Mnemonic
V+
AGND
3
V_REF
4
CH1 OUT
5
CH1 IN
6
CH3 OUT
7
CH3 IN
8
CH5 OUT
9
CH5 IN
10
WRITE
11
LD
12
V–
13
DGND
14
CLK
15
DATA
16
CH6 IN
17
CH6 OUT
18
CH4 IN
19
CH4 OUT
20
CH2 IN
21
CH2 OUT
22
MSTR SET
23
MSTR OUT
24
CH SET
SSM2160
PIN FUNCTION DESCRIPTIONS
Function
Positive Power Supply. Refer to the Application Information section for details on the power supply.
Internal Ground Reference for the Audio Circuitry. When operating the SSM2160 from dual supplies,
AGND should be connected to ground. When operating from a single supply, AGND should be connected
to V_REF, the internally generated voltage reference. AGND may also be connected to an external
reference. Refer to the Application Information section for more information on the power supply.
V_REF is the internally generated ground reference for the audio circuitry obtained from a buffered
divider between V+ and V–. In a dual-supply application with the AGND pin connected to ground,
V_REF should be left floating. In a single-supply application, V_REF should be connected to AGND. Refer
to the Application Information section for more information on the power supply.
Audio Output from Channel 1
Audio Input to Channel 1
Audio Output from Channel 3
Audio Input to Channel 3
Audio Output from Channel 5
Audio Input to Channel 5
A logic low voltage enables the SSM2160 to receive information at the DATA input (Pin 15). A logic
high retains data at their previous settings (Figure 1). Serves as CHIP SELECT.
Loads the Information Retained by WRITE into the SSM2160 at logic low (Figure 1).
Negative Power Supply. Connect to ground in a single-supply application. Refer to the Application
Information section for details on the power supply.
Digital Ground Reference. This pin should always be connected to ground. All digital inputs, including
WRITE, LD, CLK, and DATA are TTL input compatible; drive currents are returned to DGND.
Clock Input. It is positive edge triggered (Figure 1).
Channel and master control information flows MSB first into the DATA pin. Refer to the Address/Data
Decoding Truth Table, Figure 7, for information on how to control the VCAs.
Audio Input to Channel 6
Audio Output from Channel 6
Audio Input to Channel 4
Audio Output from Channel 4
Audio Input to Channel 2
Audio Output from Channel 2
Connected to the inverting input of an I-V converting op amp. It is used to generate a master control
voltage from the master control DAC current output. A resistor connected from MSTR OUT to
MSTR SET reduces the step size of the master control. See the Master/Channel Step Sizes section for
more details. A 10 µF capacitor should be connected from MSTR OUT to MSTR SET to eliminate
the zipper noise in the master control.
Connected to the output of the I-V converting op amp. See MSTR SET description.
The step size of the channel control can be increased by connecting a resistor from CH SET to V+.
No connection to CH SET is required if the default value of 1 dB per step is desired. Minimum of 10 Ω
external resistor. See the Master/Channel Step Sizes section for details.
REV. A
–5–