EVAL-ADM1185EBZ_15 Datasheet, PDF (5/12 Pages) Analog Devices – Quad Voltage Monitor and Sequencer Evaluation Kit

Preliminary Technical Data
EVALUATION BOARD OPERATION
ADM1185 SAMPLES
Two loose ADM1185 samples have been included in the
evaluation kit. Place a single sample in the socket before
powering on the evaluation board.
POWERING THE EVALUATION BOARD
There are two methods of powering the EVAL-ADM1185EBZ,
by either connecting a 9 V power supply through J3 or by
connecting a bench supply through J1 (the 9 V and ground
leads must be connected separately). When using a 9 V power
supply, ensure to switch S2 to the 9 V position; alternatively,
when using a bench supply, switch S2 to the VCC position.
SETTING VOLTAGE-DETECTION LEVELS
Each of the ADM1185’s input pins, VIN1 to VIN4, monitors
one of four supply voltages. The VIN1 pin monitors the 3.3 V
rail. An external resistor divider scales this voltage down for
monitoring at the VIN1 pin. The resistor ratio has been chosen
so that the VIN1 voltage is 0.6 V when the main voltage rises to
the preferred level at startup. For example, if R1 is 130 kΩ and
R2 is 33 kΩ, a voltage level of 2.97 V will correspond to 0.6 V at
the VIN1 pin, as shown in Figure 2.
3.3V
V
3.3V
2.97V
130kΩ _ADM1185
VIN
t
2.97V SUPPLY
GIVES 0.6V AT
VIN1 PIN
33kΩ
Figure 2. Use of External Resistor Divider to Scale Input Voltage to
Appropriate Level
Similar external resistor divider networks have also been
implemented on VIN2 to VIN4.
THEORY OF OPERATION
OUT1 is an open-drain, active high output and is connected to the
enable pin of Regulator U1. Before the voltage on VIN1 reaches
0.6 V, OUT1 is switched to ground, disabling the regulator. When
EVAL-ADM1185EBZ
the voltage on pin VIN1 reaches 0.6 V, OUT1 asserts after a 190 ms
delay. When this occurs, the open-drain output switches high
and the external pull-up resistor pulls the voltage on the regulator
enable pin above its turn-on threshold, turning on the output
of the regulator.
The 2.5 V output of this regulator begins to rise. This is detected
by Input VIN2. When VIN2 sees the 2.5 V rail rise above its
threshold point, it asserts OUT2, turning on Regulator U2. The
same scheme is, in turn, implemented on the other input and
output pins.
After the final supply, 1.5 V turns on, the outputs (OUT1 to
OUT3) are logically AND’ed together to generate a system
power-good signal (PWRGD). There is an internal 190 ms delay
associated with the assertion of the PWRGD output.
SIMULATING A POWER-UP SEQUENCE
Each of the monitored inputs is adjustable using one of the four
rotary switches, VR1 to VR4. By turning each rotary switch
clockwise, the associated input voltage is reduced. LEDs
provide a visual indication of the status of each of the four
inputs and the system PWRGD signal.
Before switching on the power supply, only the red LED, D6, will
light up, indicating that a power supply is connected to the board.
Begin with all four rotary switches turned fully anticlockwise.
Switch the power supply on using Switch S1. Because all four
rotary switches are in the anticlockwise position, all four yellow
input LEDs, D1 to D4, will light up. After a delay of 190 ms, the
green PWRG signal LED, D5, will also light up to indicate that
the ADM1185 is in the power-good state.
OBSERVING FAULT CONDITIONS
DURING POWER ON
During power up, the LEDs provide the user with a clear visual
indication of each of the four supplies. If one or more of the
supply voltages are below their associated threshold voltage, the
power-good state is not asserted and the green PWRGD LED is
not turned on.
Rev. PrA | Page 5 of 12