AD9777BSVZ Datasheet, PDF (5/60 Pages) Analog Devices – 16-Bit, 160 MSPS 2x/4x/8x Interpolating Dual TxDAC+ D/A Converter

AD9777
SPECIFICATIONS
DC SPECIFICATIONS
TMIN to TMAX, AVDD = 3.3 V, CLKVDD = 3.3 V, DVDD = 3.3 V, PLLVDD = 3.3 V, IOUTFS = 20 mA, unless otherwise noted.
Table 1.
Parameter
RESOLUTION
DC Accuracy¹
Integral Nonlinearity
Differential Nonlinearity
ANALOG OUTPUT (for 1R and 2R Gain Setting Modes)
Offset Error
Gain Error (with Internal Reference)
Gain Matching
Full-Scale Output Current²
Output Compliance Range
Output Resistance
Output Capacitance
Gain, Offset Cal DACs, Monotonicity Guaranteed
REFERENCE OUTPUT
Reference Voltage
Reference Output Current³
REFERENCE INPUT
Input Compliance Range
Reference Input Resistance
Small Signal Bandwidth
TEMPERATURE COEFFICIENTS
Offset Drift
Gain Drift (with Internal Reference)
Reference Voltage Drift
POWER SUPPLY
AVDD
Voltage Range
Analog Supply Current (IAVDD)⁴
IAVDD in SLEEP Mode
CLKVDD (PLL OFF)
Voltage Range
Clock Supply Current (ICLKVDD)⁴
CLKVDD (PLL ON)
Clock Supply Current (ICLKVDD)
DVDD
Voltage Range
Digital Supply Current (IDVDD)⁴
Nominal Power Dissipation⁴
PDIS5
PDIS in PWDN
Power Supply Rejection Ratio—AVDD
OPERATING RANGE
Min
16
−6.5
−0.025
−1.0
−1
2
−1.0
Typ
Max
±6
±3
±0.01
±0.1
200
3
+6.5
+0.025
+1.0
+1
20
+1.25
Unit
Bits
LSB
LSB
% of FSR
% of FSR
% of FSR
mA
V
kΩ
pF
1.14
1.20
1.26
V
100
nA
0.1
1.25
V
7
kΩ
0.5
MHz
0
ppm of FSR/°C
50
ppm of FSR/°C
±50
ppm/°C
3.1
3.3
3.5
V
72.5
76
mA
23.3
26
mA
3.1
3.3
3.5
V
8.5
10.0
mA
23.5
mA
3.1
3.3
3.5
V
34
41
mA
380
410
mW
1.75
W
6.0
mW
±0.4
% of FSR/V
−40
+85
°C
1 _{Measured at IOUTA driving a virtual ground.}
2 _{Nominal full-scale current, IOUTFS, is 32× the IREF current.}
3 _{Use an external amplifier to drive any external load.}
4 _{100 MSPS fDAC with fOUT = 1 MHz, all supplies = 3.3 V, no interpolation, no modulation.}
5 _{400 MSPS fDAC, fDATA = 50 MSPS, fS/2 modulation, PLL enabled.}
Rev. C | Page 5 of 60