AD7715_10 Datasheet, PDF (5/40 Pages) Analog Devices – 3 V/5 V, 450 μA 16-Bit, Sigma-Delta ADC

AD7715
AD7715-3
AVDD = 3 V, DVDD = 3 V, REF IN (+) = 1.25 V; REF IN(−) = AGND; fCLK IN = 2.4576 MHz, unless otherwise noted. All specifications TMIN
to TMAX, unless otherwise noted.
Table 2.
Parameter ¹
STATIC PERFORMANCE
No Missing Codes
Output Noise
Integral Nonlinearity
Unipolar Offset Error²
Unipolar Offset Drift³
Bipolar Zero Error²
Bipolar Zero Drift³
Positive Full-Scale Error^{2, 4}
Full-Scale Drift^{3, 5}
Gain Error^{2, 6}
Gain Drift^{3, 7}
Min
Typ
Max
16
See Table 18 to Table 22
±0.0015
See Table 15 to Table 22
0.2
See Table 15 to Table 22
0.2
See Table 15 to Table 22
0.2
See Table 15 to Table 22
0.2
Bipolar Negative Full-Scale Error²
Bipolar Negative Full-Scale Drift³
ANALOG INPUTS/REFERENCE INPUTS
Input Common-Mode Rejection
(CMR)
Normal-Mode 50 Hz Rejection⁸
Normal-Mode 60 Hz Rejection⁸
Common-Mode 50 Hz Rejection⁸
Common-Mode 60 Hz Rejection⁸
Common-Mode Voltage Range⁹
Absolute AIN/REF IN Voltage⁸
Absolute/Common-Mode AIN
Voltage⁹
AIN DC Input Current⁸
AIN Sampling Capacitance⁸
AIN Differential Voltage Range¹⁰
AIN Input Sampling Rate, fS
REF IN(+) − REF IN(−) Voltage
90
98
98
150
150
AGND
AGND − 0.03
AGND + 0.05
1
0.6
0 to
+VREF/GAIN¹¹
±VREF/GAIN
GAIN × fCLK IN/64
fCLK IN/8
1.25
±0.003
AVDD
AVDD + 0.03
AVDD − 1.5
1
10
Unit
Bits
% of FSR
μV/°C
μV/°C
μV/°C
ppm of
FSR/°C
% of FSR
μV/°C
μV/°C
dB
dB
dB
dB
dB
V
V
V
nA
pF
nom
nom
V nom
REF IN Input Sampling Rate, fS
LOGIC INPUTS
Input Current
All Inputs Except MCLK IN
VINL, Input Low Voltage
VINH, Input High Voltage
2.0
MCLK IN Only
VINL, Input Low Voltage
VINH, Input High Voltage
2.5
fCLK IN/64
±10
μA
0.8
V
V
0.4
V
V
Conditions/Comments
Guaranteed by design; filter notch ≤ 60 Hz
Depends on filter cutoffs and selected gain
Filter notch ≤ 60 Hz
Typically ±0.0004%
For gains of 1 and 2
For gains of 32 and 128
Specifications for AIN and REF IN unless noted
At dc; tpically 102 dB
For filter notches of 25 Hz, 50 Hz, ±0.02 × fNOTCH
For filter notches of 20 Hz, 60 Hz, ±0.02 × fNOTCH
For filter notches of 25 Hz, 50 Hz, ±0.02 × fNOTCH
For filter notches of 20 Hz, 60 Hz, ±0.02 × fNOTCH
AIN for BUF bit of setup register = 0 and REF IN
AIN for BUF bit of setup register = 0 and REF IN
BUF bit of setup register = 1
Unipolar input range (B/U bit of setup register = 1)
Bipolar input range (B/U bit of setup register = 0)
For gains of 1 and 2
For gains of 32 and 128
±1% for specified performance; functional with
lower VREF
Rev. D | Page 5 of 40