AD7715_10 Datasheet, PDF (31/40 Pages) Analog Devices – 3 V/5 V, 450 μA 16-Bit, Sigma-Delta ADC

CONFIGURING THE AD7715
The AD7715 contains three on-chip registers which the user
accesses via the serial interface. Communication with any of
these registers is initiated by writing to the communications
register first. Figure 10 outlines a flow chart of the sequence
which is used to configure all registers after a power-up or reset.
The flowchart also shows two different read options—the first
where the DRDY pin is polled to determine when an update of
START
POWER-ON/RESET FOR AD7715
CONFIGURE AND INITIALIZE
MICROCONTROLLER/MICROPROCESSOR SERIAL PORT
WRITE TO COMMUNICATIONS REGISTER SETTING UP
GAIN AND SETTING UP NEXT OPERATION TO BE A
WRITE TO THE SETUP REGISTER (10 HEX)
WRITE TO SETUP REGISTER SETTING UP REQUIRED
VALUES AND INITIATING A SELF CALIBRATION (68 HEX)
AD7715
the data register has taken place, the second where the DRDY
bit of the communications register is interrogated to see if a
data register update has taken place. Also included in the
flowing diagram is a series of words which should be written
to the registers for a particular set of operating conditions.
These conditions are gain of 1, no filter sync, bipolar mode,
buffer off, clock of 2.4576 MHz, and an output rate of 60 Hz.
POLL DRDY PIN
NO _DRDY
LOW?
YES
WRITE TO COMMUNICATIONS REGISTER SETTING UP
SAME GAIN AND SETTING UP NEXT OPERATION TO
BE A READ FROM THE DATA REGISTER (38 HEX)
READ FROM DATA REGISTER
WRITE TO COMMUNICATIONS REGISTER SETTING UP SAME
GAIN AND SETTING UP NEXT OPERATION TO BE A READ FROM
THE COMMUNICATIONS REGISTER (08 HEX)
READ FROM COMMUNICATIONS REGISTER
POLL DRDY BIT OF COMMUNICATIONS REGISTER
NO
DRDY
LOW?
YES
WRITE TO COMMUNICATIONS REGISTER SETTING UP
SAME GAIN AND SETTING UP NEXT OPERATION TO BE
A READ FROM THE DATA REGISTER (38 HEX)
READ FROM DATA REGISTER
Figure 10. Flow Chart for Setting Up and Reading from the AD7715
Rev. D | Page 31 of 40