ADV7181B_15 Datasheet, PDF (48/100 Pages) Analog Devices – Multiformat SDTV Video Decoder

ADV7181B
Table 57. WSS Access Information
Signal Name
Register Location
WSS1[7:0]
WSS 1[7:0]
WSS2[5:0]
WSS 2[5:0]
145d
146d
Address
0x91
0x92
Register Default Value
Readback only
Readback only
EDTV1[7:0]
012
EDTV2[7:0]
EDTV3[5:0]
NOT SUPPORTED
3 4 5 6 7 0 1 234 5 6 7 0 1 2 3 4 5
TE _{Table 58. EDTV Access Information}
E _{Signal Name}
Register Location
EDTV1[7:0]
EDTV 1[7:0]
EDTV2[7:0]
EDTV 2[7:0]
L _EDTV3[7:0]
EDTV 3[7:0]
Figure 31. EDTV Data Extraction
147d
148d
149d
Address
0x93
0x94
0x95
Register Default Value
Readback only
Readback only
Readback only
CGMS Data Registers
O _{CGMS1[7:0], Address 0x96[7:0]}
CGMS2[7:0], Address 0x97[7:0]
CGMS3[7:0], Address 0x98[7:0]
S _{Figure 32 shows the bit correspondence between the analog}
video waveform and the CGMS1/CGMS2/CGMS3 registers.
CGMS3[7:4] are undetermined and should be masked out by
software.
OB ^{+100 IRE}
Closed Caption Data Registers
CCAP1[7:0], Address 0x99[7:0]
CCAP2[7:0], Address 0x9A[7:0]
Figure 33 shows the bit correspondence between the analog
video waveform and the CCAP1/CCAP2 registers.
CCAP1[7] contains the parity bit from the first word.
CCAP2[7] contains the parity bit from the second word.
Refer to the GDECAD Gemstar Decode Ancillary Data Format,
Address 0x4C[0] section.
REF
CGMS1[7:0]
CGMS2[7:0]
CGMS3[3:0]
+70 IRE
01234567012345670123
0 IRE
–40 IRE
11.2μs
2.235μs ± 20ns
49.1μs ± 0.5μs
Figure 32. CGMS Data Extraction
CRC SEQUENCE
Rev. B | Page 48 of 100