ADV7181B_15 Datasheet, PDF (1/100 Pages) Analog Devices – Multiformat SDTV Video Decoder

Multiformat SDTV Video Decoder
ADV7181B
FEATURES
Multiformat video decoder supports NTSC-(M, J, 4.43),
Programmable video controls
PAL-(B/D/G/H/I/M/N), SECAM
Peak white/hue/brightness/saturation/contrast
Integrates three 54 MHz, 9-bit ADCs
Integrated on-chip video timing generator
Clocked from a single 27 MHz crystal
Free-run mode (generates stable video output with no I/P)
Line-locked clock-compatible (LLC)
VBI decode support for
Adaptive Digital Line Length Tracking (ADLLT™),
signal processing, and enhanced FIFO management
give mini-TBC functionality
5-line adaptive comb filters
Proprietary architecture for locking to weak, noisy, and
E ^{unstable video sources such as VCRs and tuners}
Subcarrier frequency lock and status information output
Integrated AGC with adaptive peak white mode
T ^{Macrovision® copy protection detection}
Chroma transient improvement (CTI)
Digital noise reduction (DNR)
Multiple programmable analog input formats
E _{Composite video (CVBS)}
S-Video (Y/C)
YPrPb component (VESA, MII, SMPTE, and BetaCam)
L ^{6 analog video input channels}
Automatic NTSC/PAL/SECAM identification
Digital output formats (8-bit or16-bit)
ITU-R BT.656 YCrCb 4:2:2 output + HS, VS, and FIELD
0.5 V to 1.6 V analog signal input range
O _{Differential gain: 0.6% typ}
Differential phase: 0.6° typ
GENERAL DESCRIPTION
S _{The ADV7181B integrated video decoder automatically detects}
and converts a standard analog baseband television signal
compatible with worldwide standards NTSC, PAL, and SECAM
B ^{into 4:2:2 component video data compatible with 16-bit/8-bit}
CCIR601/CCIR656.
The advanced, highly flexible digital output interface enables
O ^{performance video decoding and conversion in line-locked}
close captioning, WSS, CGMS, EDTV, Gemstar® 1×/2×
VBI decode support for
close captioning, WSS, CGMS, EDTV, and
Gemstar® 1×/2×
Power-down mode
2-wire serial MPU interface (I²C®-compatible)
3.3 V analog, 1.8 V digital core; 3.3 V IO supply
Temperature grade: –40°C to +85°C
64-lead LQFP Pb-free package and 64-lead LFCSP package
APPLICATIONS
DVD recorders
PC video
HDD-based PVRs/DVDRs
LCD TVs
Set-top boxes
Security systems
Digital televisions
Portable video devices
Automotive entertainment
AVR receivers
The fixed 54 MHz clocking of the ADCs and datapath for all
modes allows very precise, accurate sampling and digital
filtering. The line-locked clock output allows the output data
rate, timing signals, and output clock signals to be synchronous,
asynchronous, or line-locked even with ±5% line length
variation. The output control signals allow glueless interface
connections in almost any application. The ADV7181B modes
clock-based systems. This makes the device ideally suited for a
are set up over a 2-wire, serial, bidirectional port (I²C-compatible).
broad range of applications with diverse analog video charac-
teristics, including tape-based sources, broadcast sources,
security/surveillance cameras, and professional systems.
The six analog input channels accept standard composite,
S-Video, and YPrPb video signals in an extensive number of
combinations. AGC and clamp restore circuitry allow an input
The ADV7181B is fabricated in a 3.3 V CMOS process. Its
monolithic CMOS construction ensures greater functionality
with lower power dissipation.
The ADV7181B is available in two packages, a small 64-lead
LQFP Pb-free package and a 64-lead LFCSP package.
video signal peak-to-peak range of 0.5 V to 1.6 V. Alternatively,
these can be bypassed for manual settings.
Rev. B
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