ADV601 Datasheet, PDF (48/52 Pages) Analog Devices – Low Cost Multiformat Video Codec

ADV601
Parameter
t_{WR_CD_WRC}
t_{WR_CD_PWA}
t_{WR_CD_PWD}
t_{ADR_CD_WRS}
t_{ADR_CD_WRH}
t_{DATA_CD_WRS}
t_{DATA_CD_WRH}
t_{ACK_CD_WRD}
t_{ACK_CD_WROH}
Table XXXVI. Host (Compressed Data) Write Timing Parameters
Description
WR Signal, Compressed Data Direct Register, Write Cycle time
WR Signal, Compressed Data Direct Register, Pulse Width Asserted
WR Signal, Compressed Data Direct Register, Pulse Width Deasserted
ADR Bus, Compressed Data Direct Register, Write Setup
ADR Bus, Compressed Data Direct Register, Write Hold
DATA Bus, Compressed Data Direct Register, Write Setup
DATA Bus, Compressed Data Direct Register, Write Hold
ACK Signal, Compressed Data Direct Register, Write Delay
ACK Signal, Compressed Data Direct Register, Write Output Hold
(I) WR
(I) ADR, BE, CS
(I) DATA
(O) ACK
t_{WR_CD_WRC}
t_{ADR_CD_WRS}
t_{WR_CD_PWA}
VALID
t_{WR_CD_PWD}
t_{ADR_CD_WRH}
VALID
t_{DATA_CD_WRS} t_{DATA_CD_WRH}
VALID
VALID
t_{ACK_CD_WRD}
t_{ACK_CD_WROH}
Figure 40. Host (Compressed Data) Write Transfer Timing
Min Max Unit
28
N/A ns
10
N/A ns
10
N/A ns
2
N/A ns
2
N/A ns
2
N/A ns
2
N/A ns
N/A 19
ns
9
N/A ns
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