ADV7188BSTZ Datasheet, PDF (47/112 Pages) Analog Devices – Multiformat SDTV Video Decoder with Fast Switch Overlay Support

NEWAVMODE, New AV Mode, Address 0x31 [4]
0—EAV/SAV codes are generated to suit Analog Devices
encoders. No adjustments are possible.
1 (default)—Enables the manual position of VS/FIELD and AV
codes using Register 0x32, Register 0x33, and Register 0xE5 to
Register 0xEA. Default register settings are CCIR 656 compliant;
see Figure 27 for NTSC and Figure 32 for PAL. For
recommended manual user settings, see Table 62 and Figure 28
for NTSC and Table 63 and Figure 33 for PAL.
HVSTIM, Horizontal VS Timing, Address 0x31 [3]
The HVSTIM bit allows the user to select where the VS signal is
asserted within a line of video. Some interface circuitry may
require VS to go low while HS is low.
0 (default)—The start of the line is relative to HSE.
1—The start of the line is relative to HSB.
VSBHO, VS Begin Horizontal Position Odd,
Address 0x32 [7]
This bit selects the position within a line at which the VS pin
(not the bit in the AV code) becomes active. Some follow-on
chips require the VS pin to change state only when HS is
high or low.
0 (default)—The VS pin goes high at the middle of a line of
video (odd field).
1—The VS pin changes state at the start of a line (odd field).
VSBHE, VS Begin Horizontal Position Even,
Address 0x32 [6]
This bit selects the position within a line at which the VS pin
(not the bit in the AV code) becomes active. Some follow-on
chips require the VS pin to change state only when HS is
high or low.
ADV7188
0—The VS pin goes high at the middle of a line of video
(even field).
1 (default)—The VS pin changes state at the start of a line
(even field).
VSEHO VS, End Horizontal Position Odd, Address 0x33 [7]
This bit selects the position within a line at which the VS pin
(not the bit in the AV code) becomes inactive. Some follow-on
chips require the VS pin to change state only when HS is
high or low.
0—The VS pin goes low (inactive) at the middle of a line of
video (odd field).
1 (default)—The VS pin changes state at the start of a line
(odd field).
VSEHE, VS End Horizontal Position Even, Address 0x33 [6]
This bit selects the position within a line at which the VS pin
(not the bit in the AV code) becomes inactive. Some follow-on
chips require the VS pin to change state only when HS is
high or low.
0 (default)—The VS pin goes low (inactive) at the middle of a
line of video (even field).
1—The VS pin changes state at the start of a line (even field).
PVS, Polarity VS, Address 0x37 [5]
The polarity of the VS pin can be inverted using the PVS bit.
0 (default)—VS is active high.
1—VS is active low.
PF, Polarity FIELD, Address 0x37 [3]
The polarity of the FIELD pin can be inverted using the PF bit.
0 (default)—FIELD is active high.
1—FIELD is active low.
Table 62. Recommended User Settings for NTSC (See Figure 28)
Register
Register Name
0x31
Vsync Field Control 1
0x32
Vsync Field Control 2
0x33
Vsync Field Control 3
0x34
Hsync Position 1
0x35
Hsync Position 2
0x36
Hsync Position 3
0x37
Polarity
0xE5
NTSV V bit begin
0xE6
NTSC V bit end
0xE7
NTSC F bit toggle
Rev. A | Page 47 of 112
Write
0x1A
0x81
0x84
0x00
0x00
0x7D
0xA1
0x41
0x84
0x06