ADUC847_15 Datasheet, PDF (44/108 Pages) Analog Devices – 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU

ADuC845/ADuC847/ADuC848
ADC0CON2 (PRIMARY ADC CHANNEL SELECT REGISTER)
ADC0CON2 is used to select a reference source and channel for the primary ADC.
SFR Address:
E6H
Power-On Default: 00H
Bit Addressable:
No
Data Sheet
Table 26. ADC0CON2 SFR Bit Designations
Bit No. Name
Description
7, 6
XREF1, XREF0
Primary ADC External Reference Select Bit.
Set by the user to enable the primary ADC to use the external reference via REFIN± or REFIN2±.
Cleared by the user to enable the primary ADC to use the internal band gap reference (VREF = 1.25 V).
XREF1 XREF0
0
0
Internal 1.25 V Reference.
0
1
REFIN± Selected.
1
0
REFIN2± (AIN3/AIN4) Selected.
1
1
Reserved.
5
–––
Not Implemented. Write Don’t Care.
4
–––
Not Implemented. Write Don’t Care.
3, 2, 1, 0 CH3, CH2, CH1, CH0 Primary ADC Channel Select Bits. Written by the user to select the primary ADC channel as follows:
CH3 CH2 CH1 CH0 Selected Primary ADC Input Channel.
00
0
0 AIN1–AINCOM
00
0
1 AIN2–AINCOM
00
1
0 AIN3–AINCOM
00
1
1 AIN4–AINCOM
01
0
0 AIN5–AINCOM
01
0
1 AIN6–AINCOM
01
1
0 AIN7–AINCOM
01
1
1 AIN8–AINCOM
10
0
0 AIN9–AINCOM (LFCSP package only; not a valid selection on the MQFP
package)
10
0
1 AIN10–AINCOM (LFCSP package only; not a valid selection on the MQFP
package)
10
1
0 AIN1–AIN2
10
1
1 AIN3–AIN4
11
0
0 AIN5–AIN6
11
0
1 AIN7–AIN8
11
1
0 AIN9–AIN10 (LFCSP package only; not a valid selection on the MQFP
package)
11
1
1 AINCOM–AINCOM
Note that because the reference-detect does not operate on the REFIN2± pair, the REFIN2± pins can go below 1 V.
Rev. C | Page 44 of 108