UG-581 Datasheet, PDF (4/28 Pages) Analog Devices – Full-featured evaluation board

EVAL-AD7961FMCZ
Evaluation Board User Guide
EVALUATION BOARD HARDWARE
DEVICE DESCRIPTION
The AD7961 is a 5 MSPS, high precision, power efficient, 16-bit
ADC that uses SAR-based architecture and does not exhibit any
pipeline delay or latency. The AD7961 is specified for use with
5 V and 1.8 V supplies (VDD1, VDD2). The interface from the
digital host to the AD7961 uses 1.8 V logic only.
The AD7961 uses an LVDS interface to transfer data
conversions. Complete AD7961 specifications are provided in
the product data sheet and should be consulted in conjunction
with this user guide when using the evaluation board. Full details
on the EVAL-SDP-CH1Z are available on the Analog Devices
website.
HARDWARE LINK OPTIONS
The function of the link options are described in Table 1. When
the user first receives the board, the default link setting on the
board are as shown in Table 1 (analog input/reference/power
supplies, and so on).
POWER SUPPLIES
The power (+12 V) for the EVAL-AD7961FMCZ board comes
through a 160-pin FMC connector, J7, from the EVAL-SDP-
CH1Z. The customer also has the option of using external
bench top supplies to power the on-board amplifiers. On-board
regulators generate required levels from the applied +12 V rail.
The ADP7102 (U18) supplies +7 V for the +VS of the ADC
driver amplifiers (ADA4899-1 or ADA4897-1), external refer-
ence ADR4550 (U5), and ADR4540 (U8), while the ADP7104
(U10) delivers +5 V for VDD1 (U1), ADP2300 (U2), and
ADP124 (U3 and U12). The ADP2300 (U2), in turn, generates
−2.5 V for the amplifier’s –VS and the ADP124 (U3 and U12),
in turn, provides a 1.8 V for VDD2 and VIO (U1).
The +3.3 V supply for the EEPROM (U7) comes from the
EVAL-SDP-CH1Z through a 160-pin FMC connector, J7. Each
supply is decoupled where it enters the board and again at each
device. A single ground plane is used on this board to minimize
the effect of high frequency noise interference.
Table 1. Pin Jumper Descriptions
Link
Default
Purpose
JP1, JP2 B to center Connects analog inputs VIN+ and VIN− to the inputs of the ADC driverADA4899-1 or ADA4897-1. A to center sets the
fully differential path through ADA4932-1.
JP3, JP4 B to center Connect outputs from ADA4899-1 to inputs of AD7961. A to center set the fully-differential path through ADA4932-1.
JP5
A to center Connect the VCM output from AD7961 to AD8031.
JP7
A to center Connects REFIN to 2.048 V external reference. B to center connects REFIN to GND.
JP8
B to center Connects +7 V to amplifier +VS.
JP9
B to center Connects −2.5 V to amplifier −VS.
LK2, LK3 Inserted
Option to use external amplifier supplies + VS and – VS.
LK4
A
Connects to +7 V coming from ADP7102.
LK5
B
Connects to −2.5 V coming from ADP2300.
LK6
B
Connects the output of VCM buffer to VCM of amplifier.
LK7
B
Connects the +5 V output from ADR4550 to REF buffer AD8031.
Table 2. On-Board Connectors
Connector Function
J1, J2, J4, J5 SMA Analog Input. Connects the low noise analog signal source to the inputs of ADA4899-1 or ADA4932-1.
J3
3-Pin Terminal. This option is for using external bench top supplies. Apply external +Vs, −Vs, and GND to power amplifiers on
the EVAL-AD7961FMCZ board.
J6
6-Pin (2 × 3) Socket. This option is for interfacing with an external ADC driver board.
J7
160-Pin FMC 10 mm Male VITA 57 Connector. This connector mates with the EVAL-SDP-CH1Z board.
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