OP450_15 Datasheet, PDF (4/5 Pages) Analog Devices – CMOS Single-Supply Rail-to-Rail Input/Output Operational Amplifier

OP150/OP250/OP450
WAFER TEST LIMITS ^{(@ V}S ^{= +5.0 V, V}CM ^{= 0 V, T}A ^{= +25؇C unless otherwise noted.)}
Parameter
Symbol
Conditions
Limit
Units
Offset Voltage
V_OS
± 10
mV max
Input Bias Current
I_B
50
pA max
Input Offset Current
I_OS
10
pA max
Input Voltage Range
V_CM
V– to V+
V min
Common-Mode Rejection Ratio
CMRR
V_CM = 0 V to 10 V
60
dB min
Power Supply Rejection Ratio
PSRR
V = +2.7 V to +7 V
70
dB min
Large Signal Voltage Gain
A_VO
R_L = 10 kΩ
V/mV min
Output Voltage High
V_OH
R_L = 2 kΩ to GND
2.9
V min
Output Voltage Low
V_OL
R_L = 2 kΩ to V+
55
mV max
OBSOLETE ^{Supply Current/Amplifier}
I_SY
V_O = 0 V, R_L = ∞
650
µA max
NOTE
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
ABSOLUTE MAXIMUM RATINGS¹
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to V_S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Output Short-Circuit Duration to GND² . . . . . . . . . Indefinite
Storage Temperature Range
P, S, RT, RU Package . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
OP150/OP250/OP450G . . . . . . . . . . . . . . . –40°C to +125°C
Junction Temperature Range
P, S, RT, RU Package . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C
Model
OP150GS
OP150GRT
OP150GBC
OP250GP
OP250GS
OP250GRU
OP250GBC
OP450GP
ORDERING GUIDE
Temperature
Range
–40°C to +125°C
–40°C to +125°C
+25°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
+25°C
–40°C to +125°C
Package Option
8-Pin SOIC
5-Pin SOT
DICE
8-Pin Plastic DIP
8-Pin SOIC
8-Pin TSSOP
DICE
14-Pin Plastic DIP
Package Type
θ_JA3
θ_JC
Units
OP450GS
OP450GRU
–40°C to +125°C 14-Pin SOIC
–40°C to +125°C 14-Pin TSSOP
5-Pin SOT (RT)
325
°C/W ^{OP450GBC +25°C}
DICE
8-Pin Plastic DIP (P)
103
43
°C/W
8-Pin SOIC (S)
158
43
°C/W
8-Pin TSSOP (RU)
240
43
°C/W
14-Pin Plastic DIP (P)
76
33
°C/W
14-Pin SOIC (S)
120
36
°C/W
14-Pin TSSOP( RU)
180
35
°C/W
NOTES
1_{Absolute maximum ratings apply to both DICE and packaged parts, unless}
otherwise noted.
2_{θJA is specified for the worst case conditions, i.e., θJA is specified for device in}
socket for P-DIP packages; θ_JA is specified for device soldered in circuit board
for SOIC package.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the OP150/OP250/OP450 features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, p roper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Analog Devices assumes no obligation regarding future manufacture unless otherwise agreed to in writing.
PRELIMINARY TECHNICAL DATA
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