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ADM232A_15 Datasheet, PDF (4/11 Pages) Analog Devices – CMOS RS-232 Drivers/Receivers
ADM222/ADM232A/ADM242
VIN
SHDN
3k⍀
VOUT
50pF
Figure 5. Shutdown Test Circuit
3V
SHDN
INPUT
0V
tDT
V+
TRANSMITTER
OUTPUT
V–
+ 5V
– 5V
Figure 6. Transmitter Shutdown Disable Timing
C1
0.1␮F
C2
0.1␮F
5V INPUT
C5
0.1␮F
6.3V
17
2 C1+
VCC
4
+5V TO +10V
VOLTAGE DOUBLER
V+
3
C1–
5
C2+ +5V TO –10V
VOLTAGE INVERTER V–
7
6
C2–
C3
0.1␮F
C4
0.1␮F
12
T1IN
TTL/CMOS
INPUTS*
11
T2IN
TTL/CMOS
OUTPUTS
13
R1OUT
10
R2OUT
T1
T2
R1
R2
15
T1OUT
RS-232
8
OUTPUTS
T2OUT
14
R1IN
RS-232
9
INPUTS**
R2IN
ADM222
GND
18 SHDN
16 * INTERNAL 400k⍀ PULL-UP RESISTOR
ON EACH TTL/CMOS INPUT
** INTERNAL 5k⍀ PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
Figure 7. ADM222 Typical Operating Circuit
PIN FUNCTION DESCRIPTION
Mnemonic
VCC
V+
V–
GND
C1+
C1–
C2+
C2–
TIN
TOUT
RIN
ROUT
NC
EN
SHDN
Function
Power Supply Input, 5 V ± 10%.
Internally generated positive supply (+10 V
nominal).
Internally generated negative supply (–10 V
nominal).
Ground Pin. Must be connected to 0 V.
External capacitor 1, (+ terminal) is connected
to this pin.
External capacitor 1, (– terminal) is connected
to this pin.
External capacitor 2, (+ terminal) is connected
to this pin.
External capacitor 2, (– terminal) is connected
to this pin.
Transmitter (Driver) Inputs. These inputs accept
TTL/CMOS levels. An internal 400 kΩ pull-up
resistor to VCC is connected on each input.
Transmitter (Driver) Outputs. These are RS-232
levels (typically ± 9 V).
Receiver Inputs. These inputs accept RS-232
signal levels. An internal 5 kΩ pull-down resistor
to GND is connected on each of these inputs.
Receiver Outputs. These are TTL/CMOS levels.
No Connect. No connections are required to
this pin.
(ADM242 Only) Active Low Digital Input. May
be used to enable or disable (three-state) both
receiver outputs.
(ADM222 and ADM242) Active Low Digital
Input. May be used to disable the device so that
the power consumption is minimized. On the
ADM222 all drivers and receivers are disabled.
On the ADM242 the drivers are disabled but the
receivers remain enabled.
NC 1
18 SHDN
C1+ 2
V+ 3
17 VCC
16 GND
C1– 4 ADM222 15 T1OUT
C2+ 5 TOP VIEW 14 R1IN
(Not to Scale)
C2– 6
13 R1OUT
V– 7
12 T1IN
T2OUT 8
11 T2IN
R2IN 9
10 R2OUT
NC = NO CONNECT
Figure 8. ADM222 DIP and SOIC Pin Configurations
–4–
REV. B