AD5339_15 Datasheet, PDF (4/28 Pages) Analog Devices – 2.5 V to 5.5 V, 250A, 2-Wire Interface, Dual Voltage Output, 8-/10-/12-Bit DACs

AD5337/AD5338/AD5339
Parameter²
LOGIC INPUTS (A0)⁵
Input Current
Input Low Voltage (VIL)
Input High Voltage (VIH)
Pin Capacitance
LOGIC INPUTS (SCL, SDA)⁵
Input High Voltage (VIH)
Input Low Voltage (VIL)
Input Leakage Current (IIN)
Input Hysteresis (VHYST)
Input Capacitance (CIN)
Glitch Rejection
A Grade¹
B Grade¹
Min Typ
Max Min Typ
Max Unit
2.4
2.1
2.0
3
±1
0.8
0.6
0.5
2.4
2.1
2.0
3
±1
μA
0.8
V
0.6
V
0.5
V
V
V
V
pF
0.7 ×
VDD
−0.3
0.05 ×
VDD
8
VDD +
0.3
+0.3
VDD
±1
50
0.7 ×
VDD
–0.3
0.05 ×
VDD
8
VDD + V
0.3
+0.3 V
VDD
±1
μA
V
pF
50
ns
LOGIC OUTPUT (SDA)⁵
Output Low Voltage (VOL)
Three-State Leakage Current
Three-State Output Capacitance
8
POWER REQUIREMENTS
VDD
2.5
IDD (Normal Mode)⁷
VDD = 4.5 V to 5.5 V
300
VDD = 2.5 V to 3.6 V
250
IDD (Power-Down Mode)
VDD = 4.5 V to 5.5 V
0.2
0.4
0.6
±1
8
5.5
2.5
375
300
350
250
1.0
0.2
0.4
V
0.6
V
±1
μA
pF
5.5
V
375
μA
350
μA
1.0
μA
VDD = 2.5 V to 3.6 V
0.08
1.00
0.08
1.00 μA
Conditions/Comments
VDD = 5 V ± 10%
VDD = 3 V ± 10%
VDD = 2.5 V
VDD = 5 V ± 10%
VDD = 3 V ± 10%
VDD = 2.5 V
SMBus compatible at
VDD < 3.6 V
SMBus compatible at
VDD < 3.6 V
Input filtering suppresses
noise spikes of less than
50 ns
ISINK = 3 mA
ISINK = 6 mA
VIH = VDD and VIL = GND
VIH = VDD and VIL = GND
IDD = 4 μA (max) during 0
readback on SDA
IDD = 1.5 μA (max) during 0
readback on SDA
1 _{Temperature range for A Version and B Version: −40°C to +105°C; typical at 25°C.}
2 _{See the Terminology section for explanations of the specific parameters.}
3 _{DC specifications tested with the outputs unloaded.}
4 _{Linearity is tested using a reduced code range: AD5337 (Code 8 to Code 248), AD5338, AD5338-1 (Code 28 to Code 995), AD5339 (Code 115 to Code 3981).}
5 _{Guaranteed by design and characterization; not production tested.}
6 _{For the amplifier output to reach its minimum voltage, offset error must be negative; to reach its maximum voltage, VREF = VDD and offset plus gain error must be positive.}
7 _{IDD specification is valid for all DAC codes. Interface inactive. All DACs active and excluding load currents.}
Rev. C | Page 4 of 28