5962-9756401QXA Datasheet, PDF (4/16 Pages) Analog Devices – 16-Bit, 100 kSPS/200 kSPS BiCMOS A/D Converters

AD976/AD976A
Parameter
DIGITAL OUTPUTS
Data Format
Data Coding
V_OL
V_OH
Leakage Current
Output Capacitance
DIGITAL TIMING
Bus Access Time
Bus Relinquish Time
POWER SUPPLIES
Specified Performance
V_DIG
V_ANA
I_DIG
I_ANA
Power Dissipation
TEMPERATURE RANGE
Specified Performance
Specifications subject to change without notice.
Conditions
I_SINK = 1.6 mA
I_SOURCE = 500 µA
High-Z State,
V_OUT = 0 V to V_DIG
High-Z State
All Grades
Min
Typ
Max
Parallel 16 Bits
Binary Twos Complement
+0.4
+4
±5
15
83
83
4.75
5
5.25
4.75
5
5.25
3.0
11
100
–40
+85
Units
V
V
µA
pF
ns
ns
V
V
mA
mA
mW
°C
TIMING SPECIFICATIONS (AD976A: F_S = 200 kHz; AD976: F_S = 100 kHz; –40؇C to +85؇C, V_DIG = V_ANA = +5 V unless otherwise noted)
Symbol
Min
Typ
Max
Units
Convert Pulsewidth
Data Valid Delay after R/C Low (AD976A/AD976)
BUSY Delay from R/C Low
BUSY Low (AD976A/AD976)
BUSY Delay after End of Conversion (AD976A/AD976)
Aperture Delay
Conversion Time (AD976A/AD976)
Acquisition Time
Bus Relinquish Time
BUSY Delay after Data Valid (AD976A/AD976)
Previous Data Valid after R/C Low (AD976A/AD976)
Throughput Time (AD976A/AD976)
R/C to CS Setup Time
Time Between Conversions (AD976A/AD976)
Bus Access and Byte Delay
t₁
t₂
t₃
t₄
t₅
t₆
t₇
t₈
t₉
t₁₀
t₁₁
t₇ + t₈
t₁₂
t₁₃
t₁₄
50
ns
4.0/8.0
µs
83
ns
4.0/8.0
µs
180/360
ns
40
ns
3.8/7.6
4.0/8.0
µs
1.0/2.0
µs
10
35
83
ns
50
180/360
ns
3.7/7.4
µs
5/10
µs
10
ns
5/10
µs
10
83
ns
Specifications subject to change without notice.
–4–
REV. C