AD6426 Datasheet, PDF (39/50 Pages) Analog Devices – Enhanced GSM Processor

Preliminary Technical Information
TIMING CHARACTERISTICS
Parameter
t₇₀
t₇₁
t₇₂
t₇₃
t₇₄
t₇₅
Comment (see Figure 19)
ASCLK period
ASOFS setup time before ASCLK high
ASOFS hold time after ASCLK high
ASDI setup time before clock low
ASDI hold time after clock low
ASDO delay after clock high
AD6426
EVBC Interface ASPORT
Min
Typ
Max Units
384
ns
20
ns
20
ns
20
ns
20
ns
0
20
ns
t₇₀
ASCLK (O)
t₇₁
ASOFS (O)
ASDI (i)
t₇₃
t₇₄
D9
D8
D7
ASDO (O)
t₇₅
D9
D8
D7
t₇₂
A2
A1
A0
A2
A1
A0
Figure 19. EVBC Interface ASPORT Timing
This Information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog Devices assumes no
obligation regarding future manufacture unless otherwise agreed to in writing. No responsibility is assumed by Analog Devices for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent
rights of Analog Devices.
Revision Preliminary 2.3 (June 9, ´98)
- 39 -
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