ADV7392_15 Datasheet, PDF (38/108 Pages) Analog Devices – Low Power, Chip Scale, 10-Bit SD/HD Video Encoder

ADV7390/ADV7391/ADV7392/ADV7393
Data Sheet
Table 27. Register 0x80 to Register 0x83
SR7 to
Bit Number
SR0 Register
Bit Description
7 6 5 4 3 2 1 0 Register Setting
0x80
SD Mode
Register 1
SD standard
0 0 NTSC
0 1 PAL B, PAL D, PAL G, PAL H, PAL I
1 0 PAL M
1 1 PAL N
SD luma filter
000
LPF NTSC
001
LPF PAL
010
Notch NTSC
011
Notch PAL
100
Luma SSAF
101
Luma CIF
110
Luma QCIF
111
Reserved
SD chroma filter
000
1.3 MHz
001
0.65 MHz
010
1.0 MHz
011
2.0 MHz
100
Reserved
101
Chroma CIF
110
Chroma QCIF
111
3.0 MHz
0x82
SD Mode
Register 2
SD PrPb SSAF filter
0 Disabled
1 Enabled
SD DAC Output 1
0
See Table 37
1
Reserved
0
SD pedestal
0
Disabled
1
Enabled
SD square pixel mode
0
Disabled
1
Enabled
SD VCR FF/RW sync
0
Disabled
1
Enabled
SD pixel data valid
0
Disabled
1
Enabled
SD active video edge
0
control
1
Disabled
Enabled
0x83
SD Mode
Register 3
SD pedestal YPrPb output
0 No pedestal on YPrPb
1 7.5 IRE pedestal on YPrPb
SD Output Levels Y
0
Y = 700 mV/300 mV
1
Y = 714 mV/286 mV
SD Output Levels PrPb
00
700 mV p-p (PAL), 1000 mV p-p (NTSC)
01
700 mV p-p
10
1000 mV p-p
11
648 mV p-p
SD vertical blanking
interval (VBI) open
0
Disabled
1
Enabled
SD closed captioning field
control
00
01
Closed captioning disabled
Closed captioning on odd field only
10
Closed captioning on even field only
11
Closed captioning on both fields
Reserved
0
Reserved
Reset
Value
0x10
0x0B
0x04
Rev. H | Page 38 of 108