ADV612_15 Datasheet, PDF (37/46 Pages) Analog Devices – Closed Circuit TV Digital Video Codec

ADV611/ADV612
Multiplexed Philips Video Timing
The diagrams in this section show transfer timing for pixel (YCrCb) data in Multiplexed Philips video mode. For line (horizontal)
and frame (vertical) data transfer timing, see Figure 29. All output values assume a maximum pin loading of 50 pF. Note that in
timing diagrams for Multiplexed Philips video, the label CTRL indicates the VSYNC, HSYNC and FIELD pins.
Table XXII. Multiplexed Philips Video—Decode and Master Pixel (YCrCb) Timing Parameters
Parameter
t_{VDATA_DMM_D}
t_{VDATA_DMM_OH}
t_{CTRL_DMM_D}
t_{CTRL_DMM_OH}
Description
VDATA Bus, Decode Master Multiplexed Philips, Delay
VDATA Bus, Decode Master Multiplexed Philips, Output Hold
CTRL Signals, Decode Master Multiplexed Philips, Delay
CTRL Signals, Decode Master Multiplexed Philips, Output Hold
Min
Max
N/A
14
4
N/A
N/A
11
5
N/A
Unit
ns
ns
ns
ns
(O) VCLKO
(O) VDATA
(O) CTRL
VALID
t_{VDATA DMM OH}
VALID
t_{CTRL DMM OH}
t_{VDATA DMM D}
t_{CTRL DMM D}
VALID
VALID
VALID
VALID
Figure 27. Multiplexed Philips Video—Decode and Master Pixel (YCrCb) Transfer Timing
Table XXIII. Multiplexed Philips Video—Decode and Slave Pixel (YCrCb) Timing Parameters
Parameter
t_{VDATA_DSM_D}
t_{VDATA_DSM_OH}
t_{CTRL_DSM_S}
t_{CTRL_DSM_H}
Description
VDATA Bus, Decode Slave Multiplexed Philips, Delay
VDATA Bus, Decode Slave Multiplexed Philips, Output Hold
CTRL Signals, Decode Slave Multiplexed Philips, Setup
CTRL Signals, Decode Slave Multiplexed Philips, Hold
Min
Max
N/A
14
4
N/A
16
N/A
42
N/A
Unit
ns
ns
ns
ns
(O) VCLKO
(O) VDATA
(I) CTRL
VALID
t_{VDATA DSM OH}
t_{VDATA DSM D}
VALID
VALID
VALID
t_{CTRL DSM S}
t_{CTRL DSM H}
Figure 28. Multiplexed Philips Video—Decode and Slave Pixel (YCrCb) Transfer Timing
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