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AD9389_15 Datasheet, PDF (35/48 Pages) Analog Devices – 800 MHz High Performance HDMI/DVI Transmitter
AD9389
0x3C—Bits[5:0] ext_VID_to_Rx
0x4A—Bits[7:0] Active Line End LSB
Table 24.
VID
1
2
3
4
5
Format
480p
480p
480p
720p
1080i
Vertical Refresh
~60 Hz1
~60 Hz
~60 Hz
~60 Hz
~60 Hz
Combined with the MSB in Register 0x4B, the bits indicate the
last line of active video. All lines past this comprise a lower
horizontal bar. This is used in letter-box modes. If the 2-byte
value is greater than the number of lines in the display, there is
no lower horizontal bar.
0x4B—Bits[7:0] Active Line End MSB
6
480i
~60 Hz
See Register 0x4A.
7
480i
8
240p
~60 Hz
~60 Hz
0x4C—Bits[7:0] Active Pixel Start LSB
9
240p
10
480i
11
480i
12
240p
13
240p
E 14
480p
15
480p
16
1080p
T 17
576p
18
576p
19
720p
20
1080i
E 21
576i
22
576i
23
288p
L 24
288p
25
576i
26
576i
27
288p
O 28
288p
29
576p
30
576p
31
1080p
S 32
1080p
33
1080p
34
1080p
~60 Hz
~60 Hz
~60 Hz
~60 Hz
~60 Hz
~60 Hz
~60 Hz
~60 Hz
~50 Hz2
~50 Hz
~50 Hz
~50 Hz
~50 Hz
~50 Hz
~50 Hz
~50 Hz
~50 Hz
~50 Hz
~50 Hz
~50 Hz
~50 Hz
~50 Hz
~50 Hz
24 Hz to 30 Hz
24 Hz to 30 Hz
24 Hz to 30 Hz
B 1 VREF can range from 59.826 Hz to 60.115 Hz.
2 VREF can range from 49.761 Hz to 50.080 Hz.
0x3D—Bits[7:6] pr_to_Rx
O 0x43—Bits[7:0] EDID Read Address
Combined with the MSB in Register 0x4D, these bits indicate
the first pixel in the display that is active video. All pixels before
this comprise a left vertical bar. If the 2-byte value is 0x00, there
is no left bar.
0x4D—Bits[7:0] Active Pixel Start MSB
See Register 0x4C.
0x4E—Bits[7:0] Active Pixel End LSB
Combined with the MSB in Register 0x4F, these bits indicate
the last active video pixel in the display. All pixels past this
comprise a right vertical bar. If the 2-byte value is greater than
the number of pixels in the display, there is no vertical bar.
0x4F—Bits[7:0] Active Pixel End MSB
See Register 0x4E.
LINE1, PIXEL 1
4:3 DISPLAY
ACTIVE LINE START
R0x48, R0x49
TOP HORIZONTAL BAR
ACTIVE LINE END
R0x4A, R0x4B
BOTTOM HORIZONTAL BAR
Figure 9. Horizontal Bars
ACTIVE PIXEL START
R0x4C, R0x4D
ACTIVE PIXEL END
R0x4E, R0x4F
This is a programmable I2C address from which the EDID
LINE1, PIXEL 1
information (1 to 256 segment) can be read. Default is 0x7E.
4:3 DISPLAY
0x48—Bits[7:0] Active Line Start LSB
Combined with the MSB in Register 0x49, these bits indicate
the beginning line of active video. All lines before this comprise
a top horizontal bar. This is used in letter-box modes. If the
2-byte value is 0x00, there is no horizontal bar.
0x49—Bits[7:0] Active Line Start MSB
See Register 0x48.
Figure 10. Vertical Bars
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