ADSP-TS201S Datasheet, PDF (33/40 Pages) Analog Devices – TigerSHARC-R Embedded Processor

Preliminary Technical Data
ADSP-TS201S
STRENGTH 5
160
140
I_OL
120
100
V_{DD_IO} = 2.625V, –40°C
80
60
V_{DD_IO} = 2.5V, +25°C
40
20
0
–20
–40
–60
PRELIMINARY ^{VDD_IO = 2.375V, +85°C}
V_{DD_IO} = 2.625V, –40°C
V_{DD_IO} = 2.5V, +25°C
–80 ^VDD_IO ^{= 2.375V, +85°C}
–100
–120
–140
I_OH
–160
–180
0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
OUTPUT PIN VOLTAGE – V
Figure 28. Typical Drive Currents at Strength 5
STRENGTH 6
180
160
140
I_OL
120
100
80
60
V_{DD_IO} = 2.625V, –40°C
V_{DD_IO} = 2.5V, +25°C
40
Y ₂₀
AR 0
IN –20
IM –40
L _–60
RE –80
P _–100
V_{DD_IO} = 2.375V, +85°C
V_{DD_IO} = 2.625V, –40°C
V_{DD_IO} = 2.5V, +25°C
V_{DD_IO} = 2.375V, +85°C
–120
–140
–160
–180
I_OH
–200
–220
0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
OUTPUT PIN VOLTAGE – V
Figure 29. Typical Drive Currents at Strength 6
STRENGTH 7
220
200
180
I_OL
160
140
120
V_{DD_IO} = 2.625V, –40°C
100
80
60
40
20
0
–20
–40
–60
–80
V_{DD_IO} = 2.5V, +25°C
INARY ^{VDD_IO = 2.375V, +85°C}
V_{DD_IO} = 2.625V, –40°C
PRELIM ^{VDD_IO = 2.5V, +25°C}
–100 ^VDD_IO ^{= 2.375V, +85°C}
–120
–140
–160
I_OH
–180
–200
–220
0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
OUTPUT PIN VOLTAGE – V
Figure 30. Typical Drive Currents at Strength 7
TEST CONDITIONS
The ac signal specifications (timing parameters) appear
Table 22 on page 26. These include output disable time, output
enable time, and capacitive loading. The timing specifications
for the DSP apply for the voltage reference levels in Figure 31.
INPUT
OR
OUTPUT
1.25V
1.25V
Figure 31. Voltage reference levels for AC measurements (except out-
put enable/disable)
Output Disable Time
Output pins are considered to be disabled when they stop driv-
ing, go into a high impedance state, and start to decay from their
output high or low voltage. The time for the voltage on the bus
to decay by ∆V is dependent on the capacitive load, C_L and the
load current, I_L. This decay time can be approximated by the fol-
lowing equation:
tDECAY = (CL∆V) ⁄ IL
The output disable time t_DIS is the difference between
t_{MEASURED_DIS} and t_DECAY as shown in Figure 32. The time
t_{MEASURED_DIS} is the interval from when the reference signal
switches to when the output voltage decays ∆V from the mea-
sured output high or output low voltage. t_DECAY is calculated
with test loads C_L and I_L, and with ∆V equal to 0.4 V.
REFERENCE
SIGNAL
t_{MEASURED_DIS}
t_{MEASURED_ENA}
t_DIS
V_{OH (MEASURED)}
V_{OL (MEASURED)}
t_ENA
V_{OH (MEASURED)} – ⌬V 1.65V
V_{OL (MEASURED)} + ⌬V _0.85V
t_DECAY
t_RAMP
OUTPUT STOPS
DRIVING
OUTPUT STARTS
DRIVING
HIGH-IMPEDANCE STATE.
TEST CONDITIONS CAUSE THIS
VOLTAGE TO BE APPROXIMATELY 1.25V
Figure 32. Output Enable/Disable
Rev. PrH | Page 33 of 40 | December 2003