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AD9782 Datasheet, PDF (33/52 Pages) Analog Devices – 12-Bit, 200 MSPS/500 MSPS TxDAC+ with 2 x /4 x /8 x Interpolation and Signal Processing | |||
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Preliminary Technical Data
AD9782
0
â50
â100
Ã2 INTERPOLATION
INTERP[1] = 0
INTERP[0] = 1
MOD[1] = 0
MOD[0] = 1
â150â8
â6
â4
â2
0
2
4
6
8 fSIN
Ã4 INTERPOLATION
0
INTERP[1] = 1
â50
INTERP[0] = 0
MOD[1] = 0
â100
MOD[0] = 1
â150â8
â6
â4
â2
0
2
4
6
8 fSIN
Ã8 INTERPOLATION
0
INTERP[1] = 1
â50
INTERP[0] = 1
MOD[1] = 0
â100
MOD[0] = 1
â150â8
â6
â4
â2
0
2
4
6
8 fSIN
Figure 52. Complex Modulation by fDAC/2 under all Interpolation Modes
0
â50
â100
Ã2 INTERPOLATION
INTERP[1] = 0
INTERP[0] = 1
MOD[1] = 1
MOD[0] = 0
â150â8
â6
â4
â2
0
2
4
6
8 fSIN
0
Ã4 INTERPOLATION
INTERP[1] = 1
â50
INTERP[0] = 0
MOD[1] = 1
â100
MOD[0] = 0
â150
â8
â6
â4
â2
0
2
4
6
8 fSIN
0
Ã8 INTERPOLATION
INTERP[1] = 1
â50
INTERP[0] = 1
MOD[1] = 1
â100
MOD[0] = 0
â150
â8
â6
â4
â2
0
2
4
6
8 fSIN
Figure 53. Complex Modulation by fDAC/4 under all Interpolation Modes
0
â50
â100
Ã2 INTERPOLATION
INTERP[1] = 0
INTERP[0] = 1
MOD[1] = 1
MOD[0] = 1
â150
â8
â6
â4
â2
0
2
4
6
8 fSIN
Ã4 INTERPOLATION
0
INTERP[1] = 1
â50
INTERP[0] = 0
MOD[1] = 1
â100
MOD[0] = 1
â150
â8
â6
â4
â2
0
2
4
6
8 fSIN
Ã8 INTERPOLATION
0
INTERP[1] = 1
â50
INTERP[0] = 1
MOD[1] = 1
â100
MOD[0] = 1
â150
â8
â6
â4
â2
0
2
4
6
8 fSIN
Figure 54. Complex Modulation by fDAC/8 under all Interpolation Modes
Rev. PrC | Page 33 of 52
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