ADT7318_15 Datasheet, PDF (31/44 Pages) Analog Devices – 0.5C Accurate Digital Temperature Sensor and Quad Voltage Output 12-/10-/8-Bit DACs

Control Configuration 3 Register (Read/Write)
[Address 0x1A]
This configuration register is an 8-bit read/write register that
is used to set up some of the operating modes of the ADT7316/
ADT7317/ADT7318.
Table 38. Control Configuration 3
D7 D6 D5 D4 D3 D2 D1 D0
C7 C6 C5 C4 C3 C2 C1 C0
0¹
0¹
0¹
0¹
0¹
0¹
0¹
0¹
1 _{Default settings at power-up.}
Table 39. Control Configuration 3
Bit Function
C0 Selects between fast and normal ADC conversion speeds
for all three monitoring channels.
0 = ADC clock at 1.4 kHz.
1 = ADC clock at 22.5 kHz. D+ and D− analog filters are
disabled.
C1 On the ADT7316 and ADT7317, this bit selects between
8-bit and 10-bit DAC output resolution on the thermal
voltage output feature. Default = 8 bits. This bit has no
effect on the ADT7318 output because this part has only
an 8-bit DAC. In the ADT7318 case, write 0 to this bit.
0 = 8-bit resolution.
1 = 10-bit resolution.
C2 Reserved. Only write 0.
C3 0 = LDAC pin controls updating of DAC outputs.
1 = DAC configuration register and LDAC configuration
register control the updating of the DAC outputs.
C4 Reserved. Only write 0.
C5 Setting this bit selects DAC A voltage output to be
proportional to the internal temperature measurement.
C6 Setting this bit selects DAC B voltage output to be
proportional to the external temperature measurement.
C7 Reserved. Only write 0.
DAC Configuration Register (Read/Write) [Address 0x1B]
This configuration register is an 8-bit, read/write register that
is used to control the output ranges of all four DACs and to
control the loading of the DAC registers if the LDAC pin is
disabled (Bit C3 = 1, Control Configuration 3 register).
Table 40. DAC Configuration
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
0¹
0¹
0¹
0¹
0¹
0¹
0¹
0¹
1 _{Default settings at power-up.}
ADT7316/ADT7317/ADT7318
Table 41. DAC Configuration
Bit Function
D0
Selects the output range of DAC A.
0 = 0 V to VREF.
1 = 0 V to 2 VREF.
D1
Selects the output range of DAC B.
0 = 0 V to VREF.
1 = 0 V to 2 VREF.
D2
Selects the output range of DAC C.
0 = 0 V to VREF.
1 = 0 V to 2 VREF.
D3
Selects the output range of DAC D.
0 = 0 V to VREF.
1 = 0 V to 2 VREF.
D4:5 00 = MSB write to any DAC register generates an LDAC
command, which updates that DAC only.
01 = MSB write to DAC B or DAC D register generates
an LDAC command, which updates DAC A, DAC B or DAC
C, DAC D, respectively.
10 = MSB write to DAC D register generates an LDAC
command, which updates all 4 DACs.
11 = LDAC command generated from LDAC register.
D6
Setting this bit allows the external VREF to bypass the
reference buffer when supplying DAC A and DAC B.
D7
Setting this bit allows the external VREF to bypass the
reference buffer when supplying DAC C and DAC D.
LDAC Configuration Register (Write-Only)
[Address 0x1C]
This configuration register is an 8-bit write register that is used
to control the updating of the quad DAC outputs if the LDAC
pin is disabled and Bit D4 and Bit D5 of the DAC Configuration
register are both set to 1. It also selects either the internal or
external VREF for all four DACs. Bit D0 to Bit D3 in this register
are self-clearing, that is, reading back from this register always
gives 0s for these bits.
Table 42. LDAC Configuration
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
0¹
0¹
0¹
0¹
0¹
0¹
0¹
0¹
1 _{Default settings at power-up.}
Table 43. LDAC Configuration
Bit Function
D0 Writing 1 to this bit generates the LDAC command to
update the DAC A output only.
D1 Writing 1 to this bit generates the LDAC command to
update the DAC B output only.
D2 Writing 1 to this bit generates the LDAC command to
update the DAC C output only.
D3 Writing 1 to this bit generates the LDAC command to
update the DAC D output only.
D4
D5:D7
Selects either internal VREF or external VREF-AB for DAC A,
DAC B, DAC C and DAC D.
0 = External VREF.
1 = Internal VREF.
Reserved. Only write 0s.
Rev. B | Page 31 of 44