AD7175-8 Datasheet, PDF (30/64 Pages) Analog Devices – 24-Bit, 8-/16-Channel, 250 kSPS, Sigma- Delta ADC with True Rail-to-Rail Buffers

AD7175-8
Data Sheet
Table 20. Output Data Rate, Settling Time, and Noise Using the Sinc5 + Sinc1 Filter with Input Buffers Enabled
Default Output Data
Rate (SPS/Channel);
SING_CYC = 1 or with
Multiple Channels
Enabled¹
Output Data Rate
(SPS); SING_CYC = 0
and Single Channel
Enabled¹
Settling
Time¹
Notch
Frequency
(Hz)
Noise
(µV rms)
Effective
Resolution with
5 V Reference
(Bits)
Noise
(µV p-p)²
50,000
250,000
20 µs
250,000
9.8
20
85
41,667
125,000
24 µs
125,000
8.4
20.2
66
31,250
62,500
32 µs
62,500
6.4
20.6
55
27,778
50,000
36 µs
50,000
5.9
20.7
49
20,833
31,250
48 µs
31,250
4.8
21
39
17,857
25,000
56 µs
25,000
4.3
21.1
33
12,500
15,625
80 µs
15,625
3.4
21.5
26
10,000
10,000
100 µs
11,905
3
21.7
23
5000
5000
200 µs
5435
2.1
22.2
16
2500
2500
400 µs
2604
1.5
22.7
10
1000
1000
1.0 ms
1016
0.92
23.4
5.7
500.0
500
2.0 ms
504
0.68
23.8
3.9
397.5
397.5
2.516 ms 400.00
0.6
24
3.7
200.0
200
5.0 ms
200.64
0.43
24
2.2
100
100
10 ms
100.16
0.32
24
1.7
59.92
59.92
16.67 ms 59.98
0.23
24
1.2
49.96
49.96
20.016 ms 50.00
0.2
24
1
20.00
20
50.0 ms 20.01
0.14
24
0.75
16.66
16.66
60.02 ms 16.66
0.13
24
0.66
10.00
10
100 ms 10.00
0.1
24
0.47
5.00
5
200 ms 5.00
0.07
24
0.32
Peak-to-Peak
Resolution with
5 V Reference
(Bits)
16.8
17.2
17.5
17.6
18.0
18.2
18.6
18.7
19.3
19.9
20.7
21.3
21.4
22.1
22.5
23
23.3
23.7
23.9
24
24
1 _{The settling time is rounded to the nearest microsecond. This is reflected in the output data rate and channel switching rate. Channel switching rate = 1 ÷ settling time.}
2 _{Measurement taken using 1000 samples.}
Rev. 0 | Page 30 of 64