UG-486 Datasheet, PDF (3/8 Pages) Analog Devices – Evaluation Board User Guide

Evaluation Board User Guide
PCB EVALUATION GOALS
This board is intended to achieve three goals.
• It will allow a user of the ADuM5210/ADuM5211/
ADuM5212 or ADuM6210/ADuM6211/ADuM6212 to
exercise the functional capabilities of the power converter.
These include evaluation of bypass, loading, power supply
enable/disable control, and setting the adjustable output
voltage level.
• All data channel configurations of the entire family can be
exercised.
• This evaluation board demonstrates the EMI mitigation
techniques required to make a low emissions design as set
out in the AN-0971 Application Note.
The ADuM5210/ADuM5211/ADuM5212 and ADuM6210/
ADuM6211/ADuM6212 have a pin layout that is compatible
with the ADuM5010 and ADuM6010. These two additional
devices do not include data channels and consist of the
isoPower module only. One PCB design supports all four
families of parts. Many of the structures on the PCB that
support the digital channels are not used for the ADuM5010
and ADuM6010 version of the PCB.
CONNECTORS
This evaluation system is used to examine a variety of different
aspects of performance. Connections to power and instrumen-
tation are critical to performing accurate measurements without
creating artificial ringing, reflections, ripple, and EMI.
Two types of interconnect are provided: SMA edge connectors
and through-hole signal ground pairs. Between these two
options, both temporary and permanent connections to the
board can easily be made. When coax connections are desired,
SMA connectors are available for the VDDP power input and VISO
output as well as all four data I/O pins. These connectors were
chosen because they are low profile and provide excellent
mechanical connections to the PCB. Most lab equipment is
geared toward use of BNC connectors, so adaptors will be
required to use the on board connectors.
Power can be directly wired to the PCB via the P6A and P7A
through-hole connectors. These provide a power ground pair
with the power on the Pin 1 hole. These through holes are
on 200mil centers, which match the pin spacing required
for Tektronix active probes. These positions can be used for
scope test points or direct wiring of power and ground.
In many cases, the data inputs will be derived from function
generators through 50 Ω coax cables. The PCB includes
positions to install termination resistors to ground near
each connector. Two surface-mount pads are provided so
that two 100 Ω resistors can be placed in parallel to create a
50 Ω termination with sufficient power dissipation capability
to support a 5 V data stream.
UG-486
PART CONFIGURATION STRUCTURES
The ADuM5210/ADuM5211/ADuM5212 and ADuM6210/
ADuM6211/ADuM6212 have pins that must have set inputs for
the IC to operate properly. The evaluation board allows all parts
a full range of configuration options. On the primary side, the
PDIS pin must either be tied low to enable the converter, or
pulled high to disable the output power and put the part in a
standby state. Connector P3A allows a jumper to be placed
between Pin 1 and Pin 2 to disable the converter, or between
Pin 2 and Pin 3 to enable the converter. The header can be
removed if an external logic source controls the disable function
and the signal can be fed directly into Position 2 of the header.
Control of the VISO voltage is accomplished through a voltage
divider that’s center node is attached to the VSEL pin as shown
in Figure 3. There are two options for setting the output voltage
supported on this evaluation board. A 20 kΩ potentiometer is
installed at R1A in series with a 16.5 kΩ resistor at Position R16A
making a variable resistance to VISO of 16.5 kΩ to 36 kΩ. A
10 kΩ resistor to ground at Position R14A forms the lower leg
of the voltage divider. This will give a range of adjustment of
VISO < 3.3 V to > 5.0 V.
Alternatively, if a fixed output voltage is desired, R16A can be
removed and a resistor can be installed in R13A that combined
with the existing 10 kΩ resistance in R14A will form a fixed
voltage divider to set VISO to a single voltage. Refer to the
ADuM5210/ADuM5211/ADuM5212 and ADuM6210/
ADuM6211/ADuM6212 data sheets for a selection of
resistor values.
BYPASS ON THE PCB
Several positions and structures are provided to allow optimum
bypass of the evaluation board. Provisions have been made for
optional surface-mount bulk capacitors to be installed near the
power connectors to compensate for long cables to the power
supply or external load. Parallel bypass capacitors are installed
near the ADuM5210/ADuM5211/ADuM5212 or ADuM6210/
ADuM6211/ADuM6212 consisting of a 0.1 µF and a 10 µF
capacitor for VDDP and VISO. The 0.1 µF capacitors can be moved
to positions on the back side of the board if required.
The PCB also implements distributed capacitive bypass on the
primary side of the PCB. This consists of power and ground fills
on the top and bottom layers of the PCB on the VDDP side of
the board. This is one of the techniques discussed in the EMI
Mitigation section. It has the extra benefit of providing added
bypass on the primary side of the converter where the largest
currents flow as well as RF shielding.
PROVISION FOR LOADING
VISO can be loaded three ways:
• An external load can be connected via the SMA connector.
• A fixed resistor can be installed at R18A.
• A surface-mount resistor can be installed at R15A.
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