OP295 Datasheet, PDF (3/12 Pages) Analog Devices – DUAL/QUAD RAIL-TO-RAIL OPERATIONAL AMPLIFIERS

ELECTRICAL CHARACTERISTICS ^{(@ V}S ^{= ±15.0 V, T}A ^{= +25؇C unless otherwise noted)}
OP295/OP495
Parameter
Symbol
Conditions
Min
Typ Max
Units
INPUT CHARACTERISTICS
Offset Voltage
Input Bias Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
OUTPUT CHARACTERISTICS
Output Voltage Swing High
Output Voltage Swing Low
Output Current
V_OS
I_B
I_OS
V_CM
CMRR
A_VO
∆V_OS/∆T
V_OH
V_OL
I_OUT
–40°C ≤ T_A ≤ +125°C
V_CM = 0 V
V_CM = 0 V, –40°C ≤ T_A ≤ +125°C
V_CM = 0 V
V_CM = 0 V, –40°C ≤ T_A ≤ +125°C
–15.0 V ≤ V_CM ≤ +13.5 V, –40°C ≤ T_A ≤ +125°C
R_L = 10 kΩ
–15
90
1000
R_L = 100 kΩ to GND
R_L = 10 kΩ to GND
R_L = 100 kΩ to GND
R_L = 10 kΩ to GND
14.95
14.80
± 15
30
7
±1
110
4000
1
300
800
20
30
±3
±5
+13.5
–14.95
–14.85
± 25
µV
µV
nA
nA
nA
nA
V
dB
V/mV
µV/°C
V
V
V
V
mA
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current
Supply Voltage Range
PSRR
I_SY
V_S
V_S = ± 1.5 V to ± 15 V
V_S = ± 1.5 V to ± 15 V, –40°C ≤ T_A ≤ +125°C
V_O = 0 V, R_L = ∞, V_S = ± 18 V,
–40°C ≤ T_A ≤ +125°C
90
110
85
+3 (± 1.5)
dB
dB
175
µA
+36 (± 18) V
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
SR
GBP
θ_O
R_L = 10 kΩ
0.03
V/µs
85
kHz
83
Degrees
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
e_{n p-p}
e_n
i_n
0.1 Hz to 10 Hz
f =1 kHz
f = 1 kHz
1.25
µV p-p
45
nV/√Hz
<0.1
pA/√Hz
Specifications subject to change without notice.
WAFER TEST LIMITS ^{(@ V}S ^{= +5.0 V, V}CM ^{= 2.5 V, T}A ^{= +25؇C unless otherwise noted)}
Parameter
Symbol
Conditions
Limit
Units
Offset Voltage
Input Bias Current
Input Offset Current
Input Voltage Range¹
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing High
Supply Current Per Amplifier
Vos
I_B
I_OS
V_CM
CMRR
PSRR
A_VO
V_OH
I_SY
0 V ≤ V_CM ≤ 4 V
± 1.5 V ≤ V_S ≤ ± 15 V
R_L = 10 kΩ
R_L = 10 kΩ
V_OUT = 2.5 V, R_L = ∞
300
20
±2
0 to +4
90
90
1000
4.9
150
µV max
nA max
nA max
V min
dB min
µV/V
V/mV min
V min
µA max
NOTES
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
1_{Guaranteed by CMRR test.}
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Option
Model
Temperature
Range
Package
Description
Package
Option
OP295GP –40°C to +125°C 8-Pin Plastic DIP N-8
OP295GS –40°C to +125°C 8-Pin SOIC
SO-8
OP295GBC +25°C
DICE
OP495GP –40°C to +125°C 14-Pin Plastic DIP N-14
OP495GS –40°C to +125°C 16-Pin SOL
R-16
OP495GBC +25°C
DICE
REV. B
–3–