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| AD9831ASTZ Datasheet, PDF (3/16 Pages) Analog Devices – DIRECT DIGITAL SYNTGESIZER WAVEFORM GENERATOR | |||
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AD9831
TIMING CHARACTERISTICS (VDD = +3.3 V Ø 10%, +5 V Ø 10%; AGND = DGND = 0 V, unless otherwise noted)
Parameter
Limit at
TMIN to TMAX
(A Version)
Units
Test Conditions/Comments
t1
40
t2
16
t3
16
t4*
8
t4A*
8
t5
8
t6
t1
t7
5
t8
3
t9*
8
t9A*
8
t10
t1
*See Pin Description section.
Guaranteed by design but not production tested.
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
MCLK Period
MCLK High Duration
MCLK Low Duration
WR Rising Edge to MCLK Rising Edge
WR Rising Edge After MCLK Rising Edge
WR Pulse Width
Duration between Consecutive WR Pulses
Data/Address Setup Time
Data/Address Hold Time
FSELECT, PSEL0, PSEL1 Setup Time Before MCLK Rising Edge
FSELECT, PSEL0, PSEL1 Setup Time After MCLK Rising Edge
RESET Pulse Duration
t1
MCLK
t2
t3
t4A
WR
t6
t4
t5
Figure 2. Clock Synchronization Timing
WR
A0, A1, A2
DATA
t6
t5
t8
t7
VALID DATA
Figure 3. Parallel Timing
VALID DATA
MCLK
FSELECT
PSEL0, PSEL1
RESET
VALID DATA
t9
VALID DATA
t10
Figure 4. Control Timing
t9A
VALID DATA
REV. B
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